Dear team,
I am using usrpB210 vdoing some test ,uhd version is (tag: v4.4.0.0). when I
was connected the board ,I am getting below error please help me to resolve the
issue.
PHY] Waiting for RUs to be configured ... RC.ru_mask:01
[PHY] [INIT] nr_phy_init_RU() ru->num_gNB:1
[LIBCONFIG] device.recplay: 8/8 parameters successfully set, (8 to default
value)
[LIBCONFIG] device: 1/1 parameters successfully set, (1 to default value)
[LIBCONFIG] loader: 2/2 parameters successfully set, (2 to default value)
[LIBCONFIG] loader.oai_device: 2/2 parameters successfully set, (1 to default
value)
shlib_path liboai_device.so
[LOADER] library liboai_device.so successfully loaded
[HW] openair0_cfg[0].sdr_addrs == '(null)'
[HW] openair0_cfg[0].clock_source == '0' (internal = 0, external = 1)
[HW] UHD version 4.4.0.HEAD-0-g5fac246b (4.4.0)
[INFO] [UHD] linux; GNU C++ version 11.3.0; Boost_107400;
UHD_4.4.0.HEAD-0-g5fac246b
[INFO] [B200] Loading firmware image:
/usr/local/share/uhd/images/usrp_b200_fw.hex...
[HW] Found USRP b200
[INFO] [B200] Detected Device: B210
[INFO] [B200] Loading FPGA image:
/usr/local/share/uhd/images/usrp_b210_fpga.bin...
[INFO] [B200] Operating over USB 3.
[INFO] [B200] Detecting internal GPSDO....
[INFO] [GPS] No GPSDO found
[INFO] [B200] Initialize CODEC control...
[INFO] [B200] Initialize Radio control...
[INFO] [B200] Performing register loopback test...
[INFO] [B200] Register loopback test passed
[INFO] [B200] Performing register loopback test...
[INFO] [B200] Register loopback test passed
[INFO] [B200] Asking for clock rate 30.720000 MHz...
[INFO] [B200] Actually got clock rate 30.720000 MHz.
[HW] Setting clock source to internal
[HW] Setting time source to internal
-- Using calibration table: calib_table_b210_38
[INFO] [B200] Asking for clock rate 46.080000 MHz...
[INFO] [B200] Actually got clock rate 46.080000 MHz.
[WARNING] [CORES] Timer loopback test failed!
[WARNING] [CORES] Expecting clock rate: 46.08 MHz
Approximate clock rate: 0 MHz
[HW] cal 0: freq 3500000000.000000, offset 44.000000, diff 119200000.000000
[HW] cal 1: freq 2660000000.000000, offset 49.800000, diff 959200000.000000
[HW] cal 2: freq 2300000000.000000, offset 51.000000, diff 1319200000.000000
[HW] cal 3: freq 1880000000.000000, offset 53.000000, diff 1739200000.000000
[HW] cal 4: freq 816000000.000000, offset 57.000000, diff 2803200000.000000
[HW] RX Gain 0 115.000000 (44.000000) => 71.000000 (max 76.000000)
[HW] USRP TX_GAIN:77.75 gain_range:89.75 tx_gain:12.00
[HW] Actual master clock: 46.080000MHz...
[HW] Actual clock source internal...
[HW] Actual time source internal...
[HW] setting rx channel 0
[HW] RF board max packet size 1916, size for 100µs jitter 4608
[HW] rx_max_num_samps 1916
[HW] RX Channel 0
[HW] Actual RX sample rate: 46.080000MSps...
[HW] Actual RX frequency: 3.619200GHz...
[HW] Actual RX gain: 71.000000...
[HW] Actual RX bandwidth: 40.000000M...
[HW] Actual RX antenna: RX2...
[HW] TX Channel 0
[HW] Actual TX sample rate: 46.080000MSps...
[HW] Actual TX frequency: 3.619200GHz...
[HW] Actual TX gain: 77.750000...
[HW] Actual TX bandwidth: 40.000000M...
[HW] Actual TX antenna: TX/RX...
[HW] Actual TX packet size: 1916
Using Device: Single USRP:
Device: B-Series Device
Mboard 0: B210
RX Channel: 0
RX DSP: 0
RX Dboard: A
RX Subdev: FE-RX2
RX Channel: 1
RX DSP: 1
RX Dboard: A
RX Subdev: FE-RX1
TX Channel: 0
TX DSP: 0
TX Dboard: A
TX Subdev: FE-TX2
TX Channel: 1
TX DSP: 1
TX Dboard: A
TX Subdev: FE-TX1
[HW] Device timestamp: 1.168859...
[HW] [RAU] has loaded USRP B200 device.
setup_RU_buffers: frame_parms = 0x7f771c2af010
[PHY] RU 0 Setting N_TA_offset to 600 samples (factor 1.500000, UL Freq
3600120, N_RB 106, mu 1)
[PHY] Signaling main thread that RU 0 is ready, sl_ahead 6
waiting for sync (ru_thread,-1/0x555dd422f2d4,0x555dd4b7e4c0,0x555dd4b7e480)
RC.ru_mask:00
[PHY] RUs configured
ALL RUs READY!
RC.nb_RU:1
ALL RUs ready - init gNBs
Not NFAPI mode - call init_eNB_afterRU()
[PHY] init_eNB_afterRU() RC.nb_nr_inst:1
[PHY] RC.nb_nr_CC[inst:0]:0x7f771bd75010
[PHY] [gNB 0] phy_init_nr_gNB() About to wait for gNB to be configured
[LIBCONFIG] loader.dfts: 2/2 parameters successfully set, (1 to default value)
shlib_path libdfts.so
[LOADER] library libdfts.so successfully loaded
[LIBCONFIG] loader.ldpc: 2/2 parameters successfully set, (1 to default value)
shlib_path libldpc.so
[LOADER] library libldpc.so successfully loaded
[PHY] Initialise nr transport
[PHY] Mapping RX ports from 1 RUs to gNB 0
[PHY] gNB->num_RU:1
[PHY] Attaching RU 0 antenna 0 to gNB antenna 0
create a thread for core -1
create a thread for core -1
create a thread for core -1
create a thread for core -1
create a thread for core -1
create a thread for core -1
create a thread for core -1
create a thread for core -1
waiting for sync
(L1_stats_thread,-1/0x555dd422f2d4,0x555dd4b7e4c0,0x555dd4b7e480)
[PHY] Creating thread for TX reordering and dispatching to RU
ALL RUs ready - ALL gNBs ready
Sending sync to all threads
Entering ITTI signals handler
TYPE <CTRL-C> TO TERMINATE
got sync (L1_stats_thread)
got sync (ru_thread)
[HW] current pps at 2.000000, starting streaming at 3.000000
[PHY] RU 0 rf device ready
[PHY] RU 0 RF started opp_enabled 0
sleep...
Please let me know any other details required
Regards,
Sivaneshkumar K
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