Hi Lorenzo, There might be a better way to design the RAM you want. 4096 samples is only 16 KiB, which you should be able to do with block RAM. Using DRAM seems like overkill for such a small amount of data. For example, the DRAM IP itself uses more than 16 KiB of buffers just to talk to the DRAM.
We have two examples that use DRAM: the replay block (rfnoc_block_replay) and the FIFO block (rfnoc_block_axi_ram_fifo). Generally I recommend using these blocks as is if possible, since making a custom DRAM block can be a challenging task. There is a KB on the replay block ( https://kb.ettus.com/Using_the_RFNoC_Replay_Block_in_UHD_4) and a couple of software examples. Wade On Thu, Mar 23, 2023 at 4:28 PM Minutolo, Lorenzo <minut...@caltech.edu> wrote: > Hi All, > After many unsuccessfull attempts to compile a RFNOC block that uses some > memory (store and operate on 4096 samples using distributed memory results > in too many LUT/Slices being used), I am moving toward using the on-board > RAM. The reference design I am looking into is the replay block. > > My questions are: > > Does the module axi_dma_master talks by default with the on-board DRAM? > or am I looking in the wrong direction? > > Is there a more practical example or guide to access the DRAM? > > Thanks in advance, > Lorenzo > _______________________________________________ > USRP-users mailing list -- usrp-users@lists.ettus.com > To unsubscribe send an email to usrp-users-le...@lists.ettus.com >
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