This is a USRP x310, and I’m issuing a command every \~150 us. I increased the size of the timed command FIFO in the FPGA to 64.
Over long periods of time, I have hiccups like shown above on the order of every 20 ms or so. I think what’s happening is I’m not quite keeping the USRP queue full when the OS interrupts the thread, but I’m having trouble diagnosing. There doesn’t appear to be a back pressure mechanism for timed commands in the same way there is for the tx_streamer, so I have to track by elapsed time how full I think the USRP queue is.
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