On Tue, Mar 29, 2022 at 10:59 AM Marcus D. Leech <patchvonbr...@gmail.com> wrote: > > On 2022-03-29 09:55, ri28...@mit.edu wrote: > > > > I’m using a UBX-160 daughterboard. My application uses less than 50 > > MHz of bandwidth at baseband. > > > > In past experimentation I’ve done, changing the RF gain takes on the > > order of 1 ms, and I need to adjust for different beam angles an order > > of magnitude faster than that. > > > > > > > Ah, in which case, your baseband-based approach makes sense. > > So unless your existing codebase is "on the edge" of being unable to > keep-up at your sample rates, then doing a complex multiply in software > would be the way to go. > > It could also be done in RFNoC, but you'd have to ramp-up on RFNoC, and > unless there's a strong performance reason for doing it in RFNoC, stick > with the > software side.
Yes, it seems that SW is probably the best way to go. However, if you did want to do it in rfnoc. The example rfnoc block is a "complex multiplier" block, so it really is not difficult to do on the FPGA. The challenge is that you need to build it which requires an expensive Xilinx Vivado license. Rob _______________________________________________ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com
