Hi Dario, Unfortunately, Vivado's xsim simulator sometimes crashes when it runs into syntax and elaboration errors. Make sure you don't have issues like signals with multiple drivers, undriven signals, missing reset logic, typos, etc. Note that these issues may be in code that is/seems unrelated to the cmul instantiation.
Also, if you have access to ModelSim, I would highly suggest trying that tool instead as it is far more robust than xsim. You can use the vsim make target to use ModelSim. Jonathon On Sat, Nov 21, 2020 at 5:54 AM Dario Pennisi via USRP-users < usrp-users@lists.ettus.com> wrote: > Hi, > i'm trying to simulate a block where i'm using cmul. in order to have that > compiled in i am including the following in my Makefile under rfnoc/fpga in > my OOT directory: > > include $(BASE_DIR)/../lib/ip/Makefile.inc > SIM_SRCS = $(abspath rfnoc_block_demod_tb.sv) \ > $(LIB_IP_COMPLEX_MULTIPLIER_OUTS) \ > > i tried also adding this to DESIGN_SRCS but when running simulation with > Vivado 2019.1 i see the following error: > > ERROR: [XSIM 43-3983] Internal Compiler error encountered while processing > aggregate association. > ERROR: [XSIM 43-3915] Encountered a fatal error. Cannot continue. > Exiting... > > if i remove cmul instance from my design simulation works. > > can you please shed some light on how to fix this? > thanks, > > Dario Pennisi > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >
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