On 11/16/20 3:14 PM, Lamar Owen via USRP-users wrote:
So, I'm looking at issue report #304 related to the RFX board, and a
related text patch file,
https://github.com/EttusResearch/uhd/files/3881213/0001-rfx-Fix-calculation-of-prescaler-and-band-select.patch.txt
that seem to have a similar construct in
https://github.com/EttusResearch/uhd/blob/master/host/lib/usrp/dboard/db_dbsrx.cpp
along about line 302. Am I barking up the wrong tree, or if the 'for
(auto ....' construct needed changing in one case it needs changing
in this case, too? I'll need to move from the conda package to the
EPEL8 RPM package, because I know how to rebuild those and can test
patches with those. I don't know enough c++ to be able to generate
the patch, though.
Just in case this helps, here's logging output:
(base) [pari-sdr@dhcp-pool167 ~]$ UHD_LOG_CONSOLE_LEVEL=0 uhd_usrp_probe
[INFO] [UHD] linux; GNU C++ version 7.5.0; Boost_107400;
UHD_3.15.0.HEAD-release
[DEBUG] [MPMD] Discovering MPM devices on port 49600
[DEBUG] [MPMD] Discovering MPM devices on port 49600
[DEBUG] [MPMD] Discovering MPM devices on port 49600
[TRACE] [UDP] Creating udp transport for 127.255.255.255 49600
[TRACE] [UDP] Creating udp transport for 192.168.122.255 49600
[TRACE] [UDP] Creating udp transport for 192.168.1.255 49600
[DEBUG] [USRP1] USRP1 firmware image:
/home/pari-sdr/anaconda3/share/uhd/images/usrp1_fw.ihx
[TRACE] [UDP] Creating udp transport for 192.168.1.255 49152
[TRACE] [UDP] Creating udp transport for 192.168.122.255 49152
[TRACE] [UDP] Creating udp transport for 192.168.1.255 49152
[TRACE] [UDP] Creating udp transport for 192.168.122.255 49152
[TRACE] [NIRIO] rpc_client connection request cancelled/aborted.
[TRACE] [UDP] Creating udp transport for 192.168.1.255 49152
[TRACE] [UDP] Creating udp transport for 192.168.122.255 49152
[TRACE] [UDP] Creating udp transport for 192.168.1.255 50000
[TRACE] [UDP] Creating udp transport for 192.168.122.255 50000
[TRACE] [UHD] Device hash: 6433317707856818692
[DEBUG] [PREFS] Loaded system config file /etc/uhd/uhd.conf
[DEBUG] [PREFS] Loaded user config file /home/pari-sdr/.uhd/uhd.conf
[INFO] [USRP1] Opening a USRP1 device...
[DEBUG] [USRP1] USRP1 FPGA image:
/home/pari-sdr/anaconda3/share/uhd/images/usrp1_fpga.rbf
[TRACE] [USRP1] poke32(13, 0x 0)
[TRACE] [USRP1] poke32(14, 0x 0)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[DEBUG] [USRP1] USRP1 Capabilities number of duc's: 2 number of
ddc's: 2 rx halfband: 1 tx halfband: 0
[INFO] [USRP1] Using FPGA clock rate of 64.000000MHz...
[TRACE] [USRP1] codec control write reg: 0x 20
[TRACE] [USRP1] transact_spi: slave: 2 bits: 32 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 0
[TRACE] [USRP1] transact_spi: slave: 2 bits: 0 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 106
[TRACE] [USRP1] transact_spi: slave: 2 bits: 262 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 280
[TRACE] [USRP1] transact_spi: slave: 2 bits: 640 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 380
[TRACE] [USRP1] transact_spi: slave: 2 bits: 896 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 400
[TRACE] [USRP1] transact_spi: slave: 2 bits: 1024 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 504
[TRACE] [USRP1] transact_spi: slave: 2 bits: 1284 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 608
[TRACE] [USRP1] transact_spi: slave: 2 bits: 1544 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 700
[TRACE] [USRP1] transact_spi: slave: 2 bits: 1792 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 800
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2048 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 900
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2304 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x a00
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2560 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x b00
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2816 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x c00
[TRACE] [USRP1] transact_spi: slave: 2 bits: 3072 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x d00
[TRACE] [USRP1] transact_spi: slave: 2 bits: 3328 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x ec0
[TRACE] [USRP1] transact_spi: slave: 2 bits: 3776 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x fc0
[TRACE] [USRP1] transact_spi: slave: 2 bits: 4032 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 10c7
[TRACE] [USRP1] transact_spi: slave: 2 bits: 4295 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1100
[TRACE] [USRP1] transact_spi: slave: 2 bits: 4352 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1249
[TRACE] [USRP1] transact_spi: slave: 2 bits: 4681 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1312
[TRACE] [USRP1] transact_spi: slave: 2 bits: 4882 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1410
[TRACE] [USRP1] transact_spi: slave: 2 bits: 5136 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1500
[TRACE] [USRP1] transact_spi: slave: 2 bits: 5376 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1600
[TRACE] [USRP1] transact_spi: slave: 2 bits: 5632 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1700
[TRACE] [USRP1] transact_spi: slave: 2 bits: 5888 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1849
[TRACE] [USRP1] transact_spi: slave: 2 bits: 6217 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1940
[TRACE] [USRP1] transact_spi: slave: 2 bits: 6464 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2209
[TRACE] [USRP1] transact_spi: slave: 2 bits: 8713 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 280
[TRACE] [USRP1] transact_spi: slave: 2 bits: 640 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 380
[TRACE] [USRP1] transact_spi: slave: 2 bits: 896 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 10ff
[TRACE] [USRP1] transact_spi: slave: 2 bits: 4351 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 20
[TRACE] [USRP1] transact_spi: slave: 4 bits: 32 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 0
[TRACE] [USRP1] transact_spi: slave: 4 bits: 0 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 106
[TRACE] [USRP1] transact_spi: slave: 4 bits: 262 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 280
[TRACE] [USRP1] transact_spi: slave: 4 bits: 640 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 380
[TRACE] [USRP1] transact_spi: slave: 4 bits: 896 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 400
[TRACE] [USRP1] transact_spi: slave: 4 bits: 1024 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 504
[TRACE] [USRP1] transact_spi: slave: 4 bits: 1284 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 608
[TRACE] [USRP1] transact_spi: slave: 4 bits: 1544 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 700
[TRACE] [USRP1] transact_spi: slave: 4 bits: 1792 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 800
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2048 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 900
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2304 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x a00
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2560 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x b00
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2816 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x c00
[TRACE] [USRP1] transact_spi: slave: 4 bits: 3072 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x d00
[TRACE] [USRP1] transact_spi: slave: 4 bits: 3328 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x ec0
[TRACE] [USRP1] transact_spi: slave: 4 bits: 3776 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x fc0
[TRACE] [USRP1] transact_spi: slave: 4 bits: 4032 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 10c7
[TRACE] [USRP1] transact_spi: slave: 4 bits: 4295 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1100
[TRACE] [USRP1] transact_spi: slave: 4 bits: 4352 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1249
[TRACE] [USRP1] transact_spi: slave: 4 bits: 4681 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1312
[TRACE] [USRP1] transact_spi: slave: 4 bits: 4882 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1410
[TRACE] [USRP1] transact_spi: slave: 4 bits: 5136 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1500
[TRACE] [USRP1] transact_spi: slave: 4 bits: 5376 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1600
[TRACE] [USRP1] transact_spi: slave: 4 bits: 5632 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1700
[TRACE] [USRP1] transact_spi: slave: 4 bits: 5888 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1849
[TRACE] [USRP1] transact_spi: slave: 4 bits: 6217 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1940
[TRACE] [USRP1] transact_spi: slave: 4 bits: 6464 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2209
[TRACE] [USRP1] transact_spi: slave: 4 bits: 8713 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 280
[TRACE] [USRP1] transact_spi: slave: 4 bits: 640 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 380
[TRACE] [USRP1] transact_spi: slave: 4 bits: 896 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 10ff
[TRACE] [USRP1] transact_spi: slave: 4 bits: 4351 num_bits: 16
readback: 0
[TRACE] [USRP1] poke32(16, 0x 0)
[TRACE] [USRP1] poke32(17, 0x 0)
[TRACE] [USRP1] poke32(15, 0x 3)
[TRACE] [USRP1] poke32(18, 0x 0)
[TRACE] [USRP1] poke32(19, 0x 0)
[TRACE] [USRP1] poke32(15, 0x f)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] poke32( 6, 0xffff0000)
[TRACE] [USRP1] poke32(10, 0xffff0000)
[TRACE] [USRP1] poke32(23, 0x 0)
[TRACE] [USRP1] poke32( 5, 0xffff0000)
[TRACE] [USRP1] poke32( 9, 0xffff0000)
[TRACE] [USRP1] poke32(20, 0x 0)
[TRACE] [DBSRX] DBSRX: send reg 0x00, value 0x0003, start_addr =
0x0000, num_bytes 3
[TRACE] [DBSRX] DBSRX: send reg 0x01, value 0x00b6, start_addr =
0x0000, num_bytes 3
[TRACE] [DBSRX] DBSRX: send reg 0x02, value 0x003d, start_addr =
0x0000, num_bytes 3
[TRACE] [DBSRX] DBSRX: send reg 0x03, value 0x007f, start_addr =
0x0003, num_bytes 3
[TRACE] [DBSRX] DBSRX: send reg 0x04, value 0x0002, start_addr =
0x0003, num_bytes 3
[TRACE] [DBSRX] DBSRX: send reg 0x05, value 0x001f, start_addr =
0x0003, num_bytes 3
[TRACE] [DBSRX] DBSRX GC1 Gain: 0.000000 dB, dac_volts: 2.700000 V
[TRACE] [USRP1] codec control write reg: 0x 24d1
[TRACE] [USRP1] transact_spi: slave: 2 bits: 9425 num_bits: 16
readback: 0
[TRACE] [DBSRX] DBSRX GC2 Gain: 0.000000 dB, reg: 31
[TRACE] [DBSRX] DBSRX: send reg 0x05, value 0x001f, start_addr =
0x0005, num_bytes 1
[TRACE] [USRP1] poke32(23, 0x 0)
[TRACE] [USRP1] poke32( 6, 0xffff0001)
[TRACE] [DBSRX] DBSRX: trying ref_clock 4000000.000000 and m_divider 4
[TRACE] [DBSRX] DBSRX R:2
[ERROR] [DBMGR] The daughterboard manager encountered a recoverable
error in init.
Loading the "unknown" daughterboard implementations to continue.
The daughterboard cannot operate until this error is resolved.
AssertionError: m and ref_clock/m >= 1e6 and ref_clock/m <= 2.5e6
in double dbsrx::set_lo_freq(double)
at
/home/conda/feedstock_root/build_artifacts/uhd_1602712704625/work/host/lib/usrp/dboard/db_dbsrx.cpp:306
[TRACE] [USRP1] poke32( 6, 0xffff0000)
[TRACE] [USRP1] poke32(10, 0xffff0000)
[TRACE] [USRP1] poke32(23, 0x 0)
[TRACE] [USRP1] poke32( 5, 0xffff0000)
[TRACE] [USRP1] poke32( 9, 0xffff0000)
[TRACE] [USRP1] poke32(20, 0x 0)
[TRACE] [USRP1] poke32( 8, 0xffff0000)
[TRACE] [USRP1] poke32(12, 0xffff0000)
[TRACE] [USRP1] poke32(29, 0x 0)
[TRACE] [USRP1] poke32( 7, 0xffff0000)
[TRACE] [USRP1] poke32(11, 0xffff0000)
[TRACE] [USRP1] poke32(26, 0x 0)
[TRACE] [USRP1] codec control write reg: 0x 808
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2056 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 808
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2056 num_bits: 16
readback: 0
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] poke32( 1, 0x 1)
[TRACE] [USRP1] poke32(33, 0x 1f)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] poke32( 0, 0x 1)
[TRACE] [USRP1] poke32(32, 0x 1f)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] poke32(34, 0x 0)
[TRACE] [USRP1] poke32(35, 0x 0)
[TRACE] [USRP1] poke32(38, 0x 41)
[TRACE] [USRP1] poke32(39, 0x 981)
_____________________________________________________
/
| Device: USRP1 Device
| _____________________________________________________
| /
| | Mboard: USRP1
| | serial: 4460cd30
| |
| | Time sources: none
| | Clock sources: internal
| | Sensors:
| | _____________________________________________________
| | /
| | | RX DSP: 0
| | |
| | | Freq range: -32.000 to 32.000 MHz
| | _____________________________________________________
| | /
| | | RX DSP: 1
| | |
| | | Freq range: -32.000 to 32.000 MHz
| | _____________________________________________________
| | /
| | | RX Dboard: A
| | | ID: DBSRX (0x0002)
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Codec: A
| | | | Name: ad9522
| | | | Gain range pga: 0.0 to 20.0 step 1.0 dB
| | _____________________________________________________
| | /
| | | RX Dboard: B
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Codec: B
| | | | Name: ad9522
| | | | Gain range pga: 0.0 to 20.0 step 1.0 dB
| | _____________________________________________________
| | /
| | | TX DSP: 0
| | |
| | | Freq range: -44.000 to 44.000 MHz
| | _____________________________________________________
| | /
| | | TX DSP: 1
| | |
| | | Freq range: -44.000 to 44.000 MHz
| | _____________________________________________________
| | /
| | | TX Dboard: A
| | | _____________________________________________________
| | | /
| | | | TX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | TX Codec: A
| | | | Name: ad9522
| | | | Gain range pga: -20.0 to 0.0 step 0.1 dB
| | _____________________________________________________
| | /
| | | TX Dboard: B
| | | _____________________________________________________
| | | /
| | | | TX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | TX Codec: B
| | | | Name: ad9522
| | | | Gain range pga: -20.0 to 0.0 step 0.1 dB
[TRACE] [USRP1] codec control write reg: 0x 808
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2056 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 808
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2056 num_bits: 16
readback: 0
[TRACE] [USRP1] poke32( 6, 0xffff0000)
[TRACE] [USRP1] poke32(10, 0xffff0000)
[TRACE] [USRP1] poke32(23, 0x 0)
[TRACE] [USRP1] poke32( 5, 0xffff0000)
[TRACE] [USRP1] poke32( 9, 0xffff0000)
[TRACE] [USRP1] poke32(20, 0x 0)
[TRACE] [USRP1] poke32( 8, 0xffff0000)
[TRACE] [USRP1] poke32(12, 0xffff0000)
[TRACE] [USRP1] poke32(29, 0x 0)
[TRACE] [USRP1] poke32( 7, 0xffff0000)
[TRACE] [USRP1] poke32(11, 0xffff0000)
[TRACE] [USRP1] poke32(26, 0x 0)
[TRACE] [USRP1] codec control write reg: 0x 2400
[TRACE] [USRP1] transact_spi: slave: 2 bits: 9216 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2500
[TRACE] [USRP1] transact_spi: slave: 2 bits: 9472 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2600
[TRACE] [USRP1] transact_spi: slave: 2 bits: 9728 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2a00
[TRACE] [USRP1] transact_spi: slave: 2 bits: 10752 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2b00
[TRACE] [USRP1] transact_spi: slave: 2 bits: 11008 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 107
[TRACE] [USRP1] transact_spi: slave: 2 bits: 263 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 80f
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2063 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2400
[TRACE] [USRP1] transact_spi: slave: 4 bits: 9216 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2500
[TRACE] [USRP1] transact_spi: slave: 4 bits: 9472 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2600
[TRACE] [USRP1] transact_spi: slave: 4 bits: 9728 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2a00
[TRACE] [USRP1] transact_spi: slave: 4 bits: 10752 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2b00
[TRACE] [USRP1] transact_spi: slave: 4 bits: 11008 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 107
[TRACE] [USRP1] transact_spi: slave: 4 bits: 263 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 80f
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2063 num_bits: 16
readback: 0
(base) [pari-sdr@dhcp-pool167 ~]$
And with a second USRP1:
(base) [pari-sdr@dhcp-pool167 ~]$ UHD_LOG_CONSOLE_LEVEL=0 uhd_usrp_probe
[INFO] [UHD] linux; GNU C++ version 7.5.0; Boost_107400;
UHD_3.15.0.HEAD-release
[DEBUG] [MPMD] Discovering MPM devices on port 49600
[DEBUG] [MPMD] Discovering MPM devices on port 49600
[TRACE] [UDP] Creating udp transport for 127.255.255.255 49600
[TRACE] [UDP] Creating udp transport for 192.168.1.255 49600
[DEBUG] [MPMD] Discovering MPM devices on port 49600
[TRACE] [UDP] Creating udp transport for 192.168.122.255 49600
[DEBUG] [USRP1] USRP1 firmware image:
/home/pari-sdr/anaconda3/share/uhd/images/usrp1_fw.ihx
[INFO] [FX2] Loading firmware image:
/home/pari-sdr/anaconda3/share/uhd/images/usrp1_fw.ihx...
[INFO] [FX2] Firmware loaded
[TRACE] [UDP] Creating udp transport for 192.168.1.255 49152
[TRACE] [UDP] Creating udp transport for 192.168.122.255 49152
[TRACE] [UDP] Creating udp transport for 192.168.1.255 49152
[TRACE] [UDP] Creating udp transport for 192.168.122.255 49152
[TRACE] [NIRIO] rpc_client connection request cancelled/aborted.
[TRACE] [UDP] Creating udp transport for 192.168.1.255 49152
[TRACE] [UDP] Creating udp transport for 192.168.122.255 49152
[TRACE] [UDP] Creating udp transport for 192.168.1.255 50000
[TRACE] [UDP] Creating udp transport for 192.168.122.255 50000
[TRACE] [UHD] Device hash: 11462434024067858173
[DEBUG] [PREFS] Loaded system config file /etc/uhd/uhd.conf
[DEBUG] [PREFS] Loaded user config file /home/pari-sdr/.uhd/uhd.conf
[INFO] [USRP1] Opening a USRP1 device...
[DEBUG] [USRP1] USRP1 FPGA image:
/home/pari-sdr/anaconda3/share/uhd/images/usrp1_fpga.rbf
[INFO] [FX2] Loading FPGA image:
/home/pari-sdr/anaconda3/share/uhd/images/usrp1_fpga.rbf...
[INFO] [FX2] FPGA image loaded
[TRACE] [USRP1] poke32(13, 0x 0)
[TRACE] [USRP1] poke32(14, 0x 0)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[DEBUG] [USRP1] USRP1 Capabilities number of duc's: 2 number of
ddc's: 2 rx halfband: 1 tx halfband: 0
[INFO] [USRP1] Using FPGA clock rate of 64.000000MHz...
[TRACE] [USRP1] codec control write reg: 0x 20
[TRACE] [USRP1] transact_spi: slave: 2 bits: 32 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 0
[TRACE] [USRP1] transact_spi: slave: 2 bits: 0 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 106
[TRACE] [USRP1] transact_spi: slave: 2 bits: 262 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 280
[TRACE] [USRP1] transact_spi: slave: 2 bits: 640 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 380
[TRACE] [USRP1] transact_spi: slave: 2 bits: 896 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 400
[TRACE] [USRP1] transact_spi: slave: 2 bits: 1024 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 504
[TRACE] [USRP1] transact_spi: slave: 2 bits: 1284 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 608
[TRACE] [USRP1] transact_spi: slave: 2 bits: 1544 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 700
[TRACE] [USRP1] transact_spi: slave: 2 bits: 1792 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 800
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2048 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 900
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2304 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x a00
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2560 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x b00
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2816 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x c00
[TRACE] [USRP1] transact_spi: slave: 2 bits: 3072 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x d00
[TRACE] [USRP1] transact_spi: slave: 2 bits: 3328 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x ec0
[TRACE] [USRP1] transact_spi: slave: 2 bits: 3776 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x fc0
[TRACE] [USRP1] transact_spi: slave: 2 bits: 4032 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 10c7
[TRACE] [USRP1] transact_spi: slave: 2 bits: 4295 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1100
[TRACE] [USRP1] transact_spi: slave: 2 bits: 4352 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1249
[TRACE] [USRP1] transact_spi: slave: 2 bits: 4681 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1312
[TRACE] [USRP1] transact_spi: slave: 2 bits: 4882 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1410
[TRACE] [USRP1] transact_spi: slave: 2 bits: 5136 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1500
[TRACE] [USRP1] transact_spi: slave: 2 bits: 5376 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1600
[TRACE] [USRP1] transact_spi: slave: 2 bits: 5632 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1700
[TRACE] [USRP1] transact_spi: slave: 2 bits: 5888 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1849
[TRACE] [USRP1] transact_spi: slave: 2 bits: 6217 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1940
[TRACE] [USRP1] transact_spi: slave: 2 bits: 6464 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2209
[TRACE] [USRP1] transact_spi: slave: 2 bits: 8713 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 280
[TRACE] [USRP1] transact_spi: slave: 2 bits: 640 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 380
[TRACE] [USRP1] transact_spi: slave: 2 bits: 896 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 10ff
[TRACE] [USRP1] transact_spi: slave: 2 bits: 4351 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 20
[TRACE] [USRP1] transact_spi: slave: 4 bits: 32 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 0
[TRACE] [USRP1] transact_spi: slave: 4 bits: 0 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 106
[TRACE] [USRP1] transact_spi: slave: 4 bits: 262 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 280
[TRACE] [USRP1] transact_spi: slave: 4 bits: 640 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 380
[TRACE] [USRP1] transact_spi: slave: 4 bits: 896 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 400
[TRACE] [USRP1] transact_spi: slave: 4 bits: 1024 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 504
[TRACE] [USRP1] transact_spi: slave: 4 bits: 1284 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 608
[TRACE] [USRP1] transact_spi: slave: 4 bits: 1544 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 700
[TRACE] [USRP1] transact_spi: slave: 4 bits: 1792 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 800
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2048 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 900
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2304 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x a00
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2560 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x b00
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2816 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x c00
[TRACE] [USRP1] transact_spi: slave: 4 bits: 3072 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x d00
[TRACE] [USRP1] transact_spi: slave: 4 bits: 3328 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x ec0
[TRACE] [USRP1] transact_spi: slave: 4 bits: 3776 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x fc0
[TRACE] [USRP1] transact_spi: slave: 4 bits: 4032 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 10c7
[TRACE] [USRP1] transact_spi: slave: 4 bits: 4295 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1100
[TRACE] [USRP1] transact_spi: slave: 4 bits: 4352 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1249
[TRACE] [USRP1] transact_spi: slave: 4 bits: 4681 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1312
[TRACE] [USRP1] transact_spi: slave: 4 bits: 4882 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1410
[TRACE] [USRP1] transact_spi: slave: 4 bits: 5136 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1500
[TRACE] [USRP1] transact_spi: slave: 4 bits: 5376 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1600
[TRACE] [USRP1] transact_spi: slave: 4 bits: 5632 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1700
[TRACE] [USRP1] transact_spi: slave: 4 bits: 5888 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1849
[TRACE] [USRP1] transact_spi: slave: 4 bits: 6217 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 1940
[TRACE] [USRP1] transact_spi: slave: 4 bits: 6464 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2209
[TRACE] [USRP1] transact_spi: slave: 4 bits: 8713 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 280
[TRACE] [USRP1] transact_spi: slave: 4 bits: 640 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 380
[TRACE] [USRP1] transact_spi: slave: 4 bits: 896 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 10ff
[TRACE] [USRP1] transact_spi: slave: 4 bits: 4351 num_bits: 16
readback: 0
[TRACE] [USRP1] poke32(16, 0x 0)
[TRACE] [USRP1] poke32(17, 0x 0)
[TRACE] [USRP1] poke32(15, 0x 3)
[TRACE] [USRP1] poke32(18, 0x 0)
[TRACE] [USRP1] poke32(19, 0x 0)
[TRACE] [USRP1] poke32(15, 0x f)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] poke32( 6, 0xffff0000)
[TRACE] [USRP1] poke32(10, 0xffff0000)
[TRACE] [USRP1] poke32(23, 0x 0)
[TRACE] [USRP1] poke32( 5, 0xffff0000)
[TRACE] [USRP1] poke32( 9, 0xffff0000)
[TRACE] [USRP1] poke32(20, 0x 0)
[TRACE] [DBSRX] DBSRX: send reg 0x00, value 0x0003, start_addr =
0x0000, num_bytes 3
[TRACE] [DBSRX] DBSRX: send reg 0x01, value 0x00b6, start_addr =
0x0000, num_bytes 3
[TRACE] [DBSRX] DBSRX: send reg 0x02, value 0x003d, start_addr =
0x0000, num_bytes 3
[TRACE] [DBSRX] DBSRX: send reg 0x03, value 0x007f, start_addr =
0x0003, num_bytes 3
[TRACE] [DBSRX] DBSRX: send reg 0x04, value 0x0002, start_addr =
0x0003, num_bytes 3
[TRACE] [DBSRX] DBSRX: send reg 0x05, value 0x001f, start_addr =
0x0003, num_bytes 3
[TRACE] [DBSRX] DBSRX GC1 Gain: 0.000000 dB, dac_volts: 2.700000 V
[TRACE] [USRP1] codec control write reg: 0x 24d1
[TRACE] [USRP1] transact_spi: slave: 2 bits: 9425 num_bits: 16
readback: 0
[TRACE] [DBSRX] DBSRX GC2 Gain: 0.000000 dB, reg: 31
[TRACE] [DBSRX] DBSRX: send reg 0x05, value 0x001f, start_addr =
0x0005, num_bytes 1
[TRACE] [USRP1] poke32(23, 0x 0)
[TRACE] [USRP1] poke32( 6, 0xffff0001)
[TRACE] [DBSRX] DBSRX: trying ref_clock 4000000.000000 and m_divider 4
[TRACE] [DBSRX] DBSRX R:2
[ERROR] [DBMGR] The daughterboard manager encountered a recoverable
error in init.
Loading the "unknown" daughterboard implementations to continue.
The daughterboard cannot operate until this error is resolved.
AssertionError: m and ref_clock/m >= 1e6 and ref_clock/m <= 2.5e6
in double dbsrx::set_lo_freq(double)
at
/home/conda/feedstock_root/build_artifacts/uhd_1602712704625/work/host/lib/usrp/dboard/db_dbsrx.cpp:306
[TRACE] [USRP1] poke32( 6, 0xffff0000)
[TRACE] [USRP1] poke32(10, 0xffff0000)
[TRACE] [USRP1] poke32(23, 0x 0)
[TRACE] [USRP1] poke32( 5, 0xffff0000)
[TRACE] [USRP1] poke32( 9, 0xffff0000)
[TRACE] [USRP1] poke32(20, 0x 0)
[TRACE] [USRP1] poke32( 8, 0xffff0000)
[TRACE] [USRP1] poke32(12, 0xffff0000)
[TRACE] [USRP1] poke32(29, 0x 0)
[TRACE] [USRP1] poke32( 7, 0xffff0000)
[TRACE] [USRP1] poke32(11, 0xffff0000)
[TRACE] [USRP1] poke32(26, 0x 0)
[TRACE] [USRP1] codec control write reg: 0x 808
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2056 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 808
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2056 num_bits: 16
readback: 0
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] poke32( 1, 0x 1)
[TRACE] [USRP1] poke32(33, 0x 1f)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] poke32( 0, 0x 1)
[TRACE] [USRP1] poke32(32, 0x 1f)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] peek32( 3)
[TRACE] [USRP1] poke32(34, 0x 0)
[TRACE] [USRP1] poke32(35, 0x 0)
[TRACE] [USRP1] poke32(38, 0x 41)
[TRACE] [USRP1] poke32(39, 0x 981)
_____________________________________________________
/
| Device: USRP1 Device
| _____________________________________________________
| /
| | Mboard: USRP1
| | serial: 45d0d3fa
| |
| | Time sources: none
| | Clock sources: internal
| | Sensors:
| | _____________________________________________________
| | /
| | | RX DSP: 0
| | |
| | | Freq range: -32.000 to 32.000 MHz
| | _____________________________________________________
| | /
| | | RX DSP: 1
| | |
| | | Freq range: -32.000 to 32.000 MHz
| | _____________________________________________________
| | /
| | | RX Dboard: A
| | | ID: DBSRX (0x0002)
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Codec: A
| | | | Name: ad9522
| | | | Gain range pga: 0.0 to 20.0 step 1.0 dB
| | _____________________________________________________
| | /
| | | RX Dboard: B
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Codec: B
| | | | Name: ad9522
| | | | Gain range pga: 0.0 to 20.0 step 1.0 dB
| | _____________________________________________________
| | /
| | | TX DSP: 0
| | |
| | | Freq range: -44.000 to 44.000 MHz
| | _____________________________________________________
| | /
| | | TX DSP: 1
| | |
| | | Freq range: -44.000 to 44.000 MHz
| | _____________________________________________________
| | /
| | | TX Dboard: A
| | | _____________________________________________________
| | | /
| | | | TX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | TX Codec: A
| | | | Name: ad9522
| | | | Gain range pga: -20.0 to 0.0 step 0.1 dB
| | _____________________________________________________
| | /
| | | TX Dboard: B
| | | _____________________________________________________
| | | /
| | | | TX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | TX Codec: B
| | | | Name: ad9522
| | | | Gain range pga: -20.0 to 0.0 step 0.1 dB
[TRACE] [USRP1] codec control write reg: 0x 808
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2056 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 808
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2056 num_bits: 16
readback: 0
[TRACE] [USRP1] poke32( 6, 0xffff0000)
[TRACE] [USRP1] poke32(10, 0xffff0000)
[TRACE] [USRP1] poke32(23, 0x 0)
[TRACE] [USRP1] poke32( 5, 0xffff0000)
[TRACE] [USRP1] poke32( 9, 0xffff0000)
[TRACE] [USRP1] poke32(20, 0x 0)
[TRACE] [USRP1] poke32( 8, 0xffff0000)
[TRACE] [USRP1] poke32(12, 0xffff0000)
[TRACE] [USRP1] poke32(29, 0x 0)
[TRACE] [USRP1] poke32( 7, 0xffff0000)
[TRACE] [USRP1] poke32(11, 0xffff0000)
[TRACE] [USRP1] poke32(26, 0x 0)
[TRACE] [USRP1] codec control write reg: 0x 2400
[TRACE] [USRP1] transact_spi: slave: 2 bits: 9216 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2500
[TRACE] [USRP1] transact_spi: slave: 2 bits: 9472 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2600
[TRACE] [USRP1] transact_spi: slave: 2 bits: 9728 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2a00
[TRACE] [USRP1] transact_spi: slave: 2 bits: 10752 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2b00
[TRACE] [USRP1] transact_spi: slave: 2 bits: 11008 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 107
[TRACE] [USRP1] transact_spi: slave: 2 bits: 263 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 80f
[TRACE] [USRP1] transact_spi: slave: 2 bits: 2063 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2400
[TRACE] [USRP1] transact_spi: slave: 4 bits: 9216 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2500
[TRACE] [USRP1] transact_spi: slave: 4 bits: 9472 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2600
[TRACE] [USRP1] transact_spi: slave: 4 bits: 9728 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2a00
[TRACE] [USRP1] transact_spi: slave: 4 bits: 10752 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 2b00
[TRACE] [USRP1] transact_spi: slave: 4 bits: 11008 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 107
[TRACE] [USRP1] transact_spi: slave: 4 bits: 263 num_bits: 16
readback: 0
[TRACE] [USRP1] codec control write reg: 0x 80f
[TRACE] [USRP1] transact_spi: slave: 4 bits: 2063 num_bits: 16
readback: 0
(base) [pari-sdr@dhcp-pool167 ~]$
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