See also https://files.ettus.com/manual/page_usrp_b200.html#b200_customfpga
On Sun, Oct 11, 2020 at 3:05 AM Marcus D. Leech via USRP-users < usrp-users@lists.ettus.com> wrote: > On 10/10/2020 05:38 PM, Jay Labhart via USRP-users wrote: > > I am in the process of modifying the b210 fpga files and would like to > know if there is an interface that has been established for the FPGA and > host to communicate with each other. I have seen a poke64 and peek64 but > have also seen set_user_register(). > > Can anyone share if the b210 has the FPGA to host interface? > > Thanks > Jay > > You'll likely need to muck about with: > > ./host/lib/usrp/cores/user_settings_core_3000.cpp > > > My understanding of peek/poke is that they're conceptually reserved for > UHD driver code that "knows" where things are inside the FPGA > in question and that the preferred path is the user_settings stuff. > > But I'm not an FPGA guy so that's about as much as I know. > > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >
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