Marcus, That you very much. This was very helpful. I agree that putting a gain block into the GR application is ideal and that is the initial direction we are pursuing. Ultimately, we might be moving some processing into the FPGA if resources permit which would necessitate the use of gain scaler at the output of the DDC in the FPGA. One of my tasks is to determine the what will be required for such a change. Sincerely, Andrew
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