Hi Rob, I do this pretty often, and the uhd-fpga repo does let you use the Makefile.OOT.inc files to add OOT repos to device builds.
If you follow the Makefile examples in github.com/ejk43/rfnoc-ootexample, then use the uhd_image_builder.py script to add the OOT repo, it should recognize the Makefile.inc in the OOT repo and set up the device's Makefile.OOT.inc for you. I get the impression others here have had success with this approach too, but let me know if this doesn't work for you for any reason? EJ On Tue, Dec 10, 2019, 5:51 PM Rob Kossler via USRP-users < usrp-users@lists.ettus.com> wrote: > Hi, > I created my own FFT IP core and corresponding xci file using Vivado and > created a new RFNoC block to use it, noc_block_myfft. I was able to > manually modify the makefile in the rfnoc/testbenches/noc_block_myfft_tb/ > folder to add a new makefile which I created next to the xci file. I did > this following an example from the stock noc block testbenches. This works > for me. > > However, now when I want to build an actual FPGA image, the IP core is not > found. I can copy it to usrp3/top/e300/ip/ and then adjust the Ettus > makefiles accordingly, but this doesn't seem like the best approach. > > Is there a preferred way to locate custom IP when used with OOT rfnoc > blocks and then configure makefiles such that they will be found in the > build? > Rob > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >
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