Hi everyone,
In my architecture I instantiated an FM_block.vhd, and in the FM_block I
instantiated a generic_counter.vhd block.
The problem:
when I run the simulation I see that the FM_block is fine, but the
generic_counter is unreferenced, and i get the following warning:
*Starting static elaborationWARNING: [VRFC 10-122] generic_counter remains
a black-box since it has no binding entity
[/home/user/rfnoc_01/rfnoc-modules/rfnoc/fpga-src/FM_block.vhd:38]WARNING:
[VRFC 10-122] generic_counter remains a black-box since it has no binding
entity [/home/user/rfnoc_01/rfnoc-modules/rfnoc/fpga-src/FM_block.vhd:50]*
I have also opened the project in Vivado and noticed the same thing: The
file is unreferenced.
Furthermore, I add the path of the two files (FM_block and generic_counter)
to all of the Make files I could find, but to no avail.
Please help!
Thank in advance,
Ish
P.S. Further information:
The syntax used to instantiate the FM_block is as follows (verilog):
* FM_block #(.COUNTER_WIDTH(22)) FM_block_i (.clk(ce_clk),
.rst(ce_rst), .en (s_axis_data_tready), .min_BW(min_BW),
.max_BW(max_BW), .BW_change_rate(BW_change_rate), .FM_out(data_out));*
And the syntax used to instantiate the generic_counter is as follows (vhdl):
*counter_change_rate : generic_counter generic map(COUNTER_WIDTH =>
COUNTER_WIDTH) port map( clk => clk, rst => rst,
en => en, min_val => (others => '0'),
max_val => BW_change_rate, new_output =>
change_freq_en, count_out => open );*
_______________________________________________
USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
