Rob

I ran into this when running the tutorial test bench. I was able to change the 
part used for the test bench by changing ARCH and PART_ID in 
uhd/fpga-src/usrp3/tools/make/viv_sim_preamble.mak

# -------------------------------------------------------------------
# Setup simulation
# -------------------------------------------------------------------
# Define part using PART_ID (<device>/<package>/<speedgrade>)
# and architecture (zynq, kintex7, or artix7)
# User can override these if needed
#ARCH = kintex7
#PART_ID = xc7k410t/ffg900/-2
ARCH = zynq
PART_ID = XC7Z020/clg484/-1

Seems like a hack, but it got me through the simulation.

Royce Connerley

> On Aug 3, 2019, at 2:27 PM, Rob Kossler via USRP-users 
> <usrp-users@lists.ettus.com> wrote:
> 
> Hi,
> I just installed installed the latest UHD master with fpga source and 
> installed the 2018.3 Xilinx webpack (I also have a 2017.4 webpack installed 
> which was working).  I followed the rfnoc getting started build, but got the 
> following error when I tried the command "make noc_block_gain_tb"
> 
> # puts "BUILDER: Creating Vivado simulation project part $part_name"
> BUILDER: Creating Vivado simulation project part xc7k410tffg900-2
> # create_project -part $part_name -force $project_name/$project_name
> WARNING: [Device 21-436] No parts matched 'xc7k410tffg900-2'
> ERROR: [Coretcl 2-106] Specified part could not be found.
> INFO: [Common 17-206] Exiting Vivado at Sat Aug  3 14:59:04 2019...
>  
> I fully understand that webpack does not support the X310 part, but my 
> question is why is the part being selected?  At the point of running the 
> rfnoc getting started example, I have not knowingly selected any part.  My 
> assumption is that if I could change this part, the make will succeed.  Does 
> anyone know how I can make it use a webpack compatible part like xc7z020?
> 
> Thanks.
> Rob
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