Hi all,
We are facing a important issue with UHD 3.13.1.0 with the X300:
We can not Tx on the 4 channels of 2 X300s, even with the benchmark_rate
example.
We were able to do this flawlessly with UHD 3.10.3 for a long time.
Here's the command we use:
./benchmark_rate --args addr0=192.168.40.2,addr1=192.168.50.2 --tx_cpu=sc16
--tx_rate=25000000 --ref=external --pps=external --tx_channels=0,1,2,3
When using this command, the benchmark_rate hangs forever (See below the
whole output)
We have reproduced this error under Ubutun 18.04, with gcc 7.4 and Boost
1.68 (statically linked).
We also saw the same problem under Windows 10.
Please, let us if this issue was observed before, and if there is a
correction available.
Thanks,
Serge
benchmark_rate output:
./benchmark_rate --args addr0=192.168.40.2,addr1=192.168.50.2 --tx_cpu=sc16
--tx_rate=25000000 --ref=external --pps=external --tx_channels=0,1,2,3
[INFO] [UHD] linux; GNU C++ version 7.4.0; Boost_106800;
UHD_3.13.1.skydel-1-ga4c99ab3
[00:00:00.000002] Creating the usrp device with:
addr0=192.168.40.2,addr1=192.168.50.2...
[INFO] [X300] X300 initialization sequence...
[INFO] [X300] Maximum frame size: 8000 bytes.
[INFO] [X300] Maximum frame size: 8000 bytes.
[INFO] [X300] Radio 1x clock: 200 MHz
[INFO] [X300] Radio 1x clock: 200 MHz
[INFO] [1/DmaFIFO_0] Initializing block control (NOC ID: 0xF1F0D00000000000)
[INFO] [1/DmaFIFO_0] BIST passed (Throughput: 1300 MB/s)
[INFO] [GPS] Found an internal GPSDO: LC_XO, Firmware Rev 0.929a
[INFO] [1/DmaFIFO_0] BIST passed (Throughput: 1298 MB/s)
[INFO] [1/Radio_0] Initializing block control (NOC ID: 0x12AD100000000001)
[INFO] [1/Radio_1] Initializing block control (NOC ID: 0x12AD100000000001)
[INFO] [1/DDC_0] Initializing block control (NOC ID: 0xDDC0000000000000)
[INFO] [1/DDC_1] Initializing block control (NOC ID: 0xDDC0000000000000)
[INFO] [1/DUC_0] Initializing block control (NOC ID: 0xD0C0000000000000)
[INFO] [1/DUC_1] Initializing block control (NOC ID: 0xD0C0000000000000)
[INFO] [0/DmaFIFO_0] Initializing block control (NOC ID: 0xF1F0D00000000000)
[INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1299 MB/s)
[INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1294 MB/s)
[INFO] [0/Radio_0] Initializing block control (NOC ID: 0x12AD100000000001)
[INFO] [0/Radio_1] Initializing block control (NOC ID: 0x12AD100000000001)
[INFO] [0/DDC_0] Initializing block control (NOC ID: 0xDDC0000000000000)
[INFO] [0/DDC_1] Initializing block control (NOC ID: 0xDDC0000000000000)
[INFO] [0/DUC_0] Initializing block control (NOC ID: 0xD0C0000000000000)
[INFO] [0/DUC_1] Initializing block control (NOC ID: 0xD0C0000000000000)
Using Device: Multi USRP:
Device: X-Series Device
Mboard 0: X300
Mboard 1: X300
RX Channel: 0
RX DSP: 0
RX Dboard: A
RX Subdev: UBX RX
RX Channel: 1
RX DSP: 0
RX Dboard: B
RX Subdev: UBX RX
RX Channel: 2
RX DSP: 0
RX Dboard: A
RX Subdev: UBX RX
RX Channel: 3
RX DSP: 0
RX Dboard: B
RX Subdev: UBX RX
TX Channel: 0
TX DSP: 0
TX Dboard: A
TX Subdev: UBX TX
TX Channel: 1
TX DSP: 0
TX Dboard: B
TX Subdev: UBX TX
TX Channel: 2
TX DSP: 0
TX Dboard: A
TX Subdev: UBX TX
TX Channel: 3
TX DSP: 0
TX Dboard: B
TX Subdev: UBX TX
Now confirming lock on clock signals...
[00:00:05.059918] Setting device timestamp to 0...
[INFO] [MULTI_USRP] 1) catch time transition at pps edge
[INFO] [MULTI_USRP] 2) set times next pps (synchronously)
[00:00:06.714193] Testing transmit rate 25.000000 Msps on 4 channels
^C
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