Hi Scott, What paths are failing timing? Also, the Schmidl Cox block has some design issues that need fixed before it can be useful again. If I remember correctly, I think there is an issue with the peak detection logic.
Jonathon On Wed, Jul 17, 2019 at 2:28 AM Scott Mullin via USRP-users < usrp-users@lists.ettus.com> wrote: > Hello, > > I am trying to use the schmidl_cox noc block but when I build an fpga > image for an x310 with uhd_image_builder I get a timing error. I have > tried building an fpga image with only one CE, the scmidl_cox noc block, > and it still gives me a timing error, so its not due to resource > utilization, which is when I typically get a timing error. > > Has anyone else had this issue? Any help would be appreciated. > > -- > Scott Mullin > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >
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