Trying to build a FPGA image with an OOT module is not going well.  I first 
built with standard blocks and that worked, so I know my setup is OK.

I then tried to build with my OOT module (and this used to work on an old 
prefix), but now is erroring out because it can't find my OOT block.  The 
command I am running is:
python uhd_image_builder.py -y 
/opt/gnuradio/e320/src/rfnoc-nocblocks/fpga_build/my_yaml.yml -I 
/opt/gnuradio/e320/src/rfnoc-nocblocks -d e320 -t E320_RFNOC_XG

The error I see is:
ERROR: [Synth 8-439] module 'noc_block_keepMinN' not found 
[/opt/gnuradio/e320/src/uhd/fpga-src/usrp3/top/e320/rfnoc_ce_auto_inst_e320.v:54]
ERROR: [Synth 8-285] failed synthesizing module 'e320_core' 
[/opt/gnuradio/e320/src/uhd/fpga-src/usrp3/top/e320/e320_core.v:17]
ERROR: [Synth 8-285] failed synthesizing module 'e320' 
[/opt/gnuradio/e320/src/uhd/fpga-src/usrp3/top/e320/e320.v:13]
[00:10:22] Current task: Synthesis +++ Current Phase: Starting
ERROR: [Common 17-69] Command failed: Synthesis failed - please see the console 
or run log file for details
[00:10:23] Current task: Synthesis +++ Current Phase: Finished
[00:10:23] Process terminated. Status: Failure

Did something change with the image builder (I am running a newer UHD than I 
used to since this is for an E320)?



_______________________________________________
USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

Reply via email to