Hey everyone, Upon building my own custom RFNoC images for an X310 using Vivado GUI, I'm getting a critical warning stating the following: "Evaluation License Warning: This design contains one or more evaluation cores that will cease to function after a certain period of time. This design should NOT be used in production systems". It then mentions that the "ten_gig_eth_pcs_pma" IP core was generated using a design_linking license.
Nevertheless, I found this Xilinx's AR <https://www.xilinx.com/support/answers/68203.html> that says this error will appear when using both BASE-R and BASE-KR cores, but that the BASE-R one is actually free and the error message can be dismissed. I checked the sources list and it appears that Ettus are indeed using a BASE-R IP core, but I just wanted to make sure: can I keep generating bitstreams without fearing the Ethernet interfaces to stop working after they run for a while? Thanks in advance, Leo
_______________________________________________ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
