This pokes a register in the STC3. It'll pull the FPGA into reset. You then need to wait a bit before the FPGA is back up.
-- M On Fri, Feb 22, 2019 at 10:21 AM Brian Padalino via USRP-users < usrp-users@lists.ettus.com> wrote: > On Wed, Feb 20, 2019 at 7:45 PM Jonathon Pendlum < > jonathon.pend...@ettus.com> wrote: > >> Hi Armin, >> >> You can reset X3x0 series devices via a register write with the following >> command (this is in to your UHD src directory): >> firmware/usrp3/x300/x300_debug.py --addr 192.168.40.2 --poke=0x00100058 >> --data=1. >> > > Can you elaborate a little bit on what this register does, and why the UHD > software might not always poke it to reset it? > > Thanks, > Brian > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >
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