Hi! For a 5G application, I'm trying to use an X310 with a direct ethernet connection between board and pc with rate of 10GB. For this purpose I'm using the NIC INTEL ETH Converged NTWK ADPTR-SR2. Like Linux box I'm using an UBUNTU 18.04 low latency.
To to that I * Download from the Intel site the linux driver ixgbe and compiled following the related instructions * Download the uhd_003.010.003.000-release (31-Jan-2018) * Following the instruction found here https://kb.ettus.com/Building_and_Installing_the_USRP_Open-Source_Toolchain_(UHD_and_GNU_Radio)_on_Linux I installed uhd (make test ==> 100%) * Insert a optical SFP in the port 1 of X310 (verifying on the Linux box that this link is at 10GB) and by mean a couple of optical fiber I pinged the board (ping 192.168.40.2) and the ping respond correctly * I used the python script uhd_images_download to download the images in /usr/local/share/uhd/images * I burned the fpga with the command /usr/local/bin/uhd_image_loader -args="type=x300,addr=192.168.40.2" * Attached you can find the output of the two command "uhd_find_device" and "uhd_usrp_probe" A this point running the application I obtain this message: Creating the usrp device with: master_clock_rate=184320000... [INFO] [UHD] linux; GNU C++ version 7.3.0; Boost_106501; UHD_3.11.0.HEAD-0-ga1b5c4ae [INFO] [X300] X300 initialization sequence... [INFO] [X300] Determining maximum frame size... [INFO] [X300] Maximum frame size: 8000 bytes. [INFO] [X300] Setup basic communication... Error: RuntimeError: Expected FPGA compatibility number 35, but got 33: The FPGA image on your device is not compatible with this host code build. Download the appropriate FPGA images for this version of UHD. Please run: "/usr/local/lib/uhd/utils/uhd_images_downloader.py" Then burn a new image to the on-board flash storage of your USRP X3xx device using the image loader utility. Use this command: "/usr/local/bin/uhd_image_loader" --args="type=x300,addr=192.168.40.2" For more information, refer to the UHD manual: http://files.ettus.com/manual/page_usrp_x3x0.html#x3x0_flash PLEASE, could you help me to select the right image to download and solve my issue? Thank You Daniele Questo messaggio e i suoi allegati sono indirizzati esclusivamente alle persone indicate. La diffusione, copia o qualsiasi altra azione derivante dalla conoscenza di queste informazioni sono rigorosamente vietate. Qualora abbiate ricevuto questo documento per errore siete cortesemente pregati di darne immediata comunicazione al mittente e di provvedere alla sua distruzione, Grazie. This e-mail and any attachments is confidential and may contain privileged information intended for the addressee(s) only. Dissemination, copying, printing or use by anybody else is unauthorised. If you are not the intended recipient, please delete this message and any attachments and advise the sender by return e-mail, Thanks. Rispetta l'ambiente. Non stampare questa mail se non รจ necessario.
uhd_find_device: ==> linux; GNU C++ version 7.3.0; Boost_106501; UHD_003.010.003.HEAD-0-gef157678 -------------------------------------------------- -- UHD Device 0 -------------------------------------------------- Device Address: type: x300 addr: 192.168.40.2 fpga: HG name: serial: 3158D0A product: X310 uhd_usrp_probe: ==> linux; GNU C++ version 7.3.0; Boost_106501; UHD_003.010.003.HEAD-0-gef157678 -- X300 initialization sequence... -- Determining maximum frame size... 8000 bytes. -- Setup basic communication... -- Loading values from EEPROM... -- Setup RF frontend clocking... -- Radio 1x clock:200 -- [DMA FIFO] Running BIST for FIFO 0... pass (Throughput: 1295.9MB/s) -- [DMA FIFO] Running BIST for FIFO 1... pass (Throughput: 1294.9MB/s) -- [RFNoC Radio] Performing register loopback test... pass -- [RFNoC Radio] Performing register loopback test... pass -- [RFNoC Radio] Performing register loopback test... pass -- [RFNoC Radio] Performing register loopback test... pass -- Performing timer loopback test... pass -- Performing timer loopback test... pass _____________________________________________________ / | Device: X-Series Device | _____________________________________________________ | / | | Mboard: X310 | | revision: 11 | | revision_compat: 7 | | product: 30818 | | mac-addr0: 00:80:2f:19:53:d3 | | mac-addr1: 00:80:2f:19:53:d4 | | gateway: 192.168.10.1 | | ip-addr0: 192.168.10.2 | | subnet0: 255.255.255.0 | | ip-addr1: 192.168.20.2 | | subnet1: 255.255.255.0 | | ip-addr2: 192.168.30.2 | | subnet2: 255.255.255.0 | | ip-addr3: 192.168.40.2 | | subnet3: 255.255.255.0 | | serial: 3158D0A | | FW Version: 5.1 | | FPGA Version: 33.0 | | RFNoC capable: Yes | | | | Time sources: internal, external, gpsdo | | Clock sources: internal, external, gpsdo | | Sensors: ref_locked | | _____________________________________________________ | | / | | | RX Dboard: A | | | ID: UBX-160 v2 (0x007e) | | | Serial: 3158338 | | | _____________________________________________________ | | | / | | | | RX Frontend: 0 | | | | Name: UBX RX | | | | Antennas: TX/RX, RX2, CAL | | | | Sensors: lo_locked | | | | Freq range: 10.000 to 6000.000 MHz | | | | Gain range PGA0: 0.0 to 31.5 step 0.5 dB | | | | Bandwidth range: 160000000.0 to 160000000.0 step 0.0 Hz | | | | Connection Type: IQ | | | | Uses LO offset: No | | | _____________________________________________________ | | | / | | | | RX Codec: A | | | | Name: ads62p48 | | | | Gain range digital: 0.0 to 6.0 step 0.5 dB | | _____________________________________________________ | | / | | | RX Dboard: B | | | ID: UBX-160 v2 (0x007e) | | | Serial: 315834A | | | _____________________________________________________ | | | / | | | | RX Frontend: 0 | | | | Name: UBX RX | | | | Antennas: TX/RX, RX2, CAL | | | | Sensors: lo_locked | | | | Freq range: 10.000 to 6000.000 MHz | | | | Gain range PGA0: 0.0 to 31.5 step 0.5 dB | | | | Bandwidth range: 160000000.0 to 160000000.0 step 0.0 Hz | | | | Connection Type: IQ | | | | Uses LO offset: No | | | _____________________________________________________ | | | / | | | | RX Codec: B | | | | Name: ads62p48 | | | | Gain range digital: 0.0 to 6.0 step 0.5 dB | | _____________________________________________________ | | / | | | TX Dboard: A | | | ID: UBX-160 v2 (0x007d) | | | Serial: 3158338 | | | _____________________________________________________ | | | / | | | | TX Frontend: 0 | | | | Name: UBX TX | | | | Antennas: TX/RX, CAL | | | | Sensors: lo_locked | | | | Freq range: 10.000 to 6000.000 MHz | | | | Gain range PGA0: 0.0 to 31.5 step 0.5 dB | | | | Bandwidth range: 160000000.0 to 160000000.0 step 0.0 Hz | | | | Connection Type: QI | | | | Uses LO offset: No | | | _____________________________________________________ | | | / | | | | TX Codec: A | | | | Name: ad9146 | | | | Gain Elements: None | | _____________________________________________________ | | / | | | TX Dboard: B | | | ID: UBX-160 v2 (0x007d) | | | Serial: 315834A | | | _____________________________________________________ | | | / | | | | TX Frontend: 0 | | | | Name: UBX TX | | | | Antennas: TX/RX, CAL | | | | Sensors: lo_locked | | | | Freq range: 10.000 to 6000.000 MHz | | | | Gain range PGA0: 0.0 to 31.5 step 0.5 dB | | | | Bandwidth range: 160000000.0 to 160000000.0 step 0.0 Hz | | | | Connection Type: QI | | | | Uses LO offset: No | | | _____________________________________________________ | | | / | | | | TX Codec: B | | | | Name: ad9146 | | | | Gain Elements: None | | _____________________________________________________ | | / | | | RFNoC blocks on this device: | | | | | | * DmaFIFO_0 | | | * Radio_0 | | | * Radio_1 | | | * DDC_0 | | | * DDC_1 | | | * DUC_0 | | | * DUC_1
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