On 09/21/2018 12:12 AM, Chintan Patel wrote:
Marcus,

Thanks. So, if I have the right PCIe driver and setup, can I use the X310 without GigE port being connected? In other words, when using PCIe is both the data and control plane carried over PCIe?

Thanks
Chintan
Yes, absolutely.



On Thu, Sep 20, 2018 at 4:13 PM Marcus D. Leech via USRP-users <usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:

    On 09/20/2018 03:26 PM, Chintan Patel via USRP-users wrote:
    > Hello,
    >
    > Some high-level questions on the X310 architecture and
    implementation
    > related to the GigE/PCIe support.
    >
    > The X310 allows host connectivity using 10G or PCIe connections.
    Is it
    > implied that if the Ethernet interfaces are being used to
    connect to
    > the host, the PCIe is not being used? In the FPGA, the Ethernet
    logic
    > is conditionally compiled, but the PCIe logic is always included
    > (which is perfectly understandable). Assuming there are different
    > drivers for Ethernet and PCIe, how is this selection of which
    > interface is being used (PCIe vs GigE) incorporated into software.
    > More specifically, how does/where in the UHD software code does
    this
    > reconciliation happen between whether the low level FPGA calls (e.g
    > peek32, poke32) are happening over PCIe or Ethernet? So for e.g, if
    > there is a piece of UHD code that reads FPGA version register ,
    does
    > it use the PCIe driver (if I am only connected to the PCIe) or
    does it
    > use the Ethernet driver (if I am only connected via GigE).
    >
    > I realize this inquiry is more along theoretical lines, and
    might not
    > be very clear - but if anyone can shed light will be very helpful.
    >
    > Thanks
    >
    In UHD, you specify the device arguments---that will either be an
    "addr"
    or a "resource".  The former is ip address, the latter is a PCIE
    resource name for
       the NI driver.



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