I had a system that worked pretty well for creating a new bitfile for my E310. I ran through all the steps again so I could make sure that my notes were OK, but now I get an error when I run a probe on my E310 using that bitfile. I copied over the bitfile and replaced /home/root/localinstall/usr/share/uhd/images/usrp_e310_fpga_sg3.bit with it. I source the env, then I run uhd_usrp_probe: root@ettus-e3xx-sg3:~# uhd_usrp_probe [INFO] [UHD] linux; GNU C++ version 7.3.0; Boost_106400; UHD_4.0.0.rfnoc-devel-702-geec24d7b [INFO] [E300] Loading FPGA image: /home/root/localinstall/usr/share/uhd/images/usrp_e310_fpga_sg3.bit... [INFO] [E300] FPGA image loaded [INFO] [E300] Initializing core control (global registers)... [INFO] [E300] Performing register loopback test... [INFO] [E300] Register loopback test passed [INFO] [0/Radio_0] Initializing block control (NOC ID: 0x12AD100000000000) [WARNING] [RFNOC] Can't find a block controller for key KeepOneInN, using default block controller! [INFO] [0/KeepOneInN_0] Initializing block control (NOC ID: 0x0246000000000000) [INFO] [0/FIR_0] Initializing block control (NOC ID: 0xF112000000000000) [WARNING] [RFNOC] Can't find a block controller for key FIFO, using default block controller! [INFO] [0/FIFO_0] Initializing block control (NOC ID: 0xF1F0000000000000) [WARNING] [RFNOC] Can't find a block controller for key FIFO, using default block controller! [INFO] [0/FIFO_1] Initializing block control (NOC ID: 0xF1F0000000000000) [ERROR] [AD936X] CODEC loopback test failed! Expected: 0x7C2024A0 Received (TX/RX): 0x7C2024A0/0x00000000 Error: RuntimeError: CODEC loopback test failed. this was built on my host by running the command: ./uhd_image_builder.py keep_one_in_n fir_filter -d e310 -t E310_RFNOC_sg3 -m 4 --fill-with-fifos So it appears to me that it built all the blocks I requested, but the CODEC loopback failure is a new one for me. Since this build process worked fine for me the previous day, I have no idea why it wouldn't work a second time (unless it could be some sort of weird fpga timing issue?).....
Extra info: 1 - The uhd hash is: eec24d7 2 - The fpga-src hash within uhd is: 9c8c2ba 3 - gnuradio's hash is (this shouldn't matter since I am not even running GR yet): e4acf4f 4 - gr-ettus' hash is: 51e8828 ~Jason
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