On 07/23/2018 03:17 PM, Erik Malone via USRP-users wrote: > Hi > > I'm looking for a way to log all signals when simulating an RFNoC design > in batch mode. This would help me to run longer tests and then bring up > a waveform whenever an error occurred. Preferably, I'd like to keep > within Ettus' current simulation flow.
Do you mean, within the testbench? Vivado's xsim will make all signals available to you, you just need to add them to the list of signals that you want to observe. -- M _______________________________________________ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
