I'm positive I've done exactly this, but it was 18 months ago -- and that design has since moved to using 1 input and 2 outputs instead. I don't recall having any trouble getting that part to work, but there's been a lot of changes to RFNoC since then.
On Tue, May 29, 2018, 5:12 PM EJ Kreinar via USRP-users < [email protected]> wrote: > Hi Brian, > > Fascinating question! I'm not sure many have considered this possibility > (1-input, 4-output RFNoC block), though I agree I'd like to see RFNoC > support this use-case... > > Looks to me like this for loop in device3_io_impl could be getting in the > way: > https://github.com/EttusResearch/uhd/blob/rfnoc-devel/host/lib/usrp/device3/device3_io_impl.cpp#L569 > > Correct me if I'm wrong here, but it appears to be looping through all > upstream nodes and writing the response destination using the block port of > the *terminator* node, rather than the block port that's connected in the > RFNoC graph. This suggests to me there's an assumption that each block port > is always connected to the corresponding block port number of all upstream > nodes-- which is probably how the blocks are used in the majority of > configurations (2-channel radio -> 2-channel DDC -> 2-channel DMA FIFO), > but may not be sufficient for the arbitrary case... > > Is my interpretation correct?? > EJ > > > > On Mon, May 28, 2018 at 5:35 PM, Brian Padalino via USRP-users < > [email protected]> wrote: > >> I've got a single input, 4-output RFNoC block that I am trying to hook up >> to a C++ testbench, but I'm having some trouble. >> >> Referencing the unaligned output version from gr-ettus: >> >> >> https://github.com/EttusResearch/gr-ettus/blob/master/lib/rfnoc_block_impl.cc >> >> My graph is Radio -> DDC -> Custom Block -> Host. >> >> I am setting up my device_addr_t with 3 attributes: block_id, block_port, >> and block_portX where X is from 0 to 3. >> >> When I print my args I am sending into get_rx_stream(), they look >> appropriate: >> >> block_id=0/MYBLOCK_0,block_port=0,block_port0=0 >> >> The issue is when I get to block port 2, I get a LookupError about >> 0/Radio_0: >> >> Error: LookupError: KeyError: [0/Radio_0] sr_write(): No such port: 2 >> >> I'm sure I'm just doing something incorrectly, but I can't find much >> documentation on getting the streams working with multiple unaligned output >> ports from the same block coming back to the host. I'm very confused why >> port 2 of the Radio is being addressed? >> >> I've used the noc_block_invert_tb as my guide to produce the streams in >> the FPGA: >> >> >> https://github.com/EttusResearch/fpga/tree/rfnoc-devel/usrp3/lib/rfnoc/noc_block_invert_tb >> >> And an HDL testbench appears to work correctly. Host UHD guidance is >> appreciated. It would be nice to see real example C++ code interacting >> with UHD directly with the stock FPGA image. I believe fosphor has 2 >> output ports and 1 input port? >> >> Thanks, >> Brian >> >> _______________________________________________ >> USRP-users mailing list >> [email protected] >> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >> >> > _______________________________________________ > USRP-users mailing list > [email protected] > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >
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