Hi everyone, I follow the instruction in the following website in order to add new IP to my X310. http://www.synchronouslabs.com/blog/creating-a-custom-rfnoc-block-with-using-xillinx-ip
At the last stage in the website, in order to build the bin file that burn to the FPGA, they use the make.py script. I try to find this script, but I didn't success ,so I try to build the bin with the uhd_usrp_builder.py code. The problem is, that the IP that I add to the Makefile like in the website, don't really add like all the others IP, that define by default. The error that I get is : module fir_compiler_0 don't found. When I look on the build.log I saw that my IP don't add to the project. Can someone help me how to download the make.py file or how to finish the process with the uhd_usrp_builder.py script. Thank in advance, Ishai The information in this e-mail transmission contains proprietary and business sensitive information. Unauthorized interception of this e-mail may constitute a violation of law. If you are not the intended recipient, you are hereby notified that any review, dissemination, distribution or duplication of this communication is strictly prohibited. You are also asked to contact the sender by reply email and immediately destroy all copies of the original message.
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