Thank you for the detailed answer, Marcus. All crystal clear now :)

Regards,
Brais.​


2018-03-01 20:48 GMT+01:00 Marcus Müller via USRP-users <
usrp-users@lists.ettus.com>:

> To expand on that: I might be overusing this figure but:
>
>
>
> If your b_sample is sufficiently smaller than the E310's maximum analog
> bandwidth (to be exact, smaller than half of 56 MHz, ie. smaller than 28
> MHz, which it better be, because the storage nor network on the E310 really
> isn't up to working with very high rates), you can simply use offset
> tuning, indeed.
> From a user's perspective, this is still baseband sampling: the offset
> tuning through tune_request_t happens in the FPGA, so you're still
> presented with the same samples around f_target.
>
> Hope that helps,
> Marcus M
> On Wed, 2018-02-28 at 17:28 -0500, Marcus D. Leech via USRP-users wrote:
>
> On 02/28/2018 03:32 PM, Brais Ares via USRP-users wrote:
>
> Hello,
>
> We are using a E310 device to capture a signal and further process it in
> Matlab. We also have a frontend that lift the received signal around 43 dB
> before going into the E310.
>
> When we use direct RF to baseband conversion we observe a high DC
> suppression, around 50 dB (see figure here <https://imgur.com/a/sLWyE>)
>
> Is there any way to avoid it or the only option is to move this "hole" by
> tuning the lo_offset in tune_request_t (then not using direct RF
> conversion, but converting to IF first) further away from the signal I'm
> interested in?
>
> And out of curiosity, which would be the exact block of the rx chain which
> is performing this DC suppression?
>
> Regards,
> Brais.
>
> DC offset suppression is performed inside the AD9361.
>
> If your signal is right at the notional centre frequency and is very
> narrowband, you can get significant suppression of it.  The way to deal
> with this is
>   to use offset tuning.
>
>
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