On Tue, Jan 23, 2018 at 12:13:48PM -0500, Kei Nguyen via USRP-users wrote: > I mean s16 -> f32 not sc16 -> fc32, which is already implemented. > I looked through the document but it's not clear to me. I'm not sure about > UHD code structure. Could you explain in more details? > Sorry for any confusion.
Like I said, s16 -> fc32 is already implemented. Assuming your FPGA code produces real samples (s16), you then select f32 as your output format. Select appropriate values in your uhd::stream_args_t struct. Cheers, Martin
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