Thank you Marcus. Regarding your former questions, I use manual gain control (doesn't really change the gain). Regarding the sharp cutoff, it seems sharp - sample values don't seem to gradually increase when going out of "0 mode".
On Fri, Oct 27, 2017 at 8:38 PM <mle...@ripnet.com> wrote: > So, I wrote the following script for testing this morning: > > http://www.ccera.ca/files/tuning_test.grc > > It does random frequency hopping with 1MHz offsets, with a base frequency > of 2.4GHz. > > It runs for 60 seconds and then just dumps complex I/Q data to a file. > > I then wrote a quick C program to do run-length analysis, and indeed, > there are long runs of exact zeros after a tuning event, averaging about > 4.2ms with the above parameters. > > I made no attempt to use any of the fancy-tuning options available via a > "tune_request_t". > > What I do know is that the AD9361 isn't ideal for frequency-hopping > applications. A lot of "stuff" needs to happen every time it is tuned. My > recollection is that tune times used to be in the range of 50-100msec for > this part, but that an optimization was put in place to reduce this for > "short hops". > > > > > > > On 2017-10-27 01:23, Marcus D. Leech via USRP-users wrote: > > On 10/27/2017 12:44 AM, Gilad Beeri (ApolloShield) wrote: > > Thanks Marcus. > > I was told by Ettus in the past that nearby hops (X00's of MHz) should > take some tens of microseconds to settle (for the AD936x chip), while I see > 3 milliseconds. > Can you reconfirm the former saying, or confirm that you also experience > ~3 milliseconds of 0's when you change frequency with a delta of tens of > MHz? > > In addition, I would expect that during the settling time, I will get > garbage data / noise, and not 0 samples. Do you know the reason I get 0's? > > My *guess* is that this is the AD9361 doing a "mute during tuning" thing. > I don't know whether that's a feature that can be disabled, and whether at > some point in the code history, it was enabled. A cursory inspection > of the code doesn't reveal anything obvious. > > When you experience your zero-valued samples, is it a sharp cutoff, or is > there a ramp into, and out-of the zero-valued-samples state? > > Are you using manual or automatic gain control? > > > > > On Thu, Oct 26, 2017 at 5:27 PM Marcus D. Leech via USRP-users < > usrp-users@lists.ettus.com> wrote: > >> On 10/26/2017 06:43 AM, Gilad Beeri (ApolloShield) via USRP-users wrote: >> >> Hi, >> Whenever I switch center frequency with a USRP B205mini (changing to a >> nearby frequency), I get 3 milliseconds of 0 samples. >> >> >> 1. What's the reason behind that? >> 2. Can I make some changes that will reduce that timespan without >> data? >> >> The analog hardware takes a finite amount of time to switch frequencies. >> During that time, there will inevitably be *some* type of glitch. >> >> A PLL synthesizer will take some amount of time to change frequency. >> Every time you change frequency, you take it out of its converged state, and >> it has to re-converge. >> >> >> https://electronics.stackexchange.com/questions/76197/pll-loop-bandwidth-lock-time-and-jitter >> >> >> _______________________________________________ >> USRP-users mailing list >> USRP-users@lists.ettus.com >> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > > > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > >
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