Dario,

Can you post your RFNoC block Verilog code?

Nick

On Mon, Sep 25, 2017 at 11:38 AM Dario Pennisi via USRP-users <
usrp-users@lists.ettus.com> wrote:

> Hi,
>
> We are developing a block which needs two inputs from the two radios. The
> block works with one input but when adding the second one only the first
> input is fed with data.
>
> Block has noc_shell instantiated with INPUT_PORTS(2) and its str_data
> output bus is connected to two axi_wrappers. Adding ILA shows that ready is
> always high on both sides but only the first side ever gets valid data.
>
>
>
> In the gnuradio xml initialization is done like this:
>
>
>
> <make> iptronix.block(
>
> self.device3,
>
>           uhd.stream_args( # TX Stream Args
>
>                 cpu_format="sc16",
>
>                 otw_format="sc16",
>
>                 channels=(0,1),
>
>                 args="",
>
>           ),
>
>           uhd.stream_args( # RX Stream Args
>
>                 cpu_format="sc16",
>
>                 otw_format="sc16",
>
>                 args=""
>
>           ),
>
>           $block_index,
>
>           $device_index
>
> )
>
> </make>
>
> …
>
>   <sink>
>
>     <name>in</name>
>
>     <type>fc32</type>
>
>     <vlen>$grvlen</vlen>
>
>     <domain>rfnoc</domain>
>
>     <nports>2</nports>
>
>   </sink>
>
>
>
> Whereas in the rfnoc block definition we added the following:
>
>
>
>   <ports>
>
>     <sink>
>
>          <name>in_0</name>
>
>          <type>sc16</type>
>
>    </sink>
>
>     <sink>
>
>          <name>ini_1</name>
>
>          <type>sc16</type>
>
>     </sink>
>
>     <source>
>
>          <name>out0</name>
>
>          <type>sc16</type>
>
>     </source>
>
>   </ports>
>
>
>
> Is there anything we’re not doing correctly? I could not find any example
> other than addsub that shows how to set up a rfnoc block with two inputs
> and one output…
>
> Thanks,
>
>
>
> Dario Pennisi
>
>
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