HI all,
We run command uhd_usrp_probe,output as below:

-- X300 initialization sequence...
-- Determining maximum frame size... 1472 bytes.
-- Setup basic communication...
-- Loading values from EEPROM...
-- Setup RF frontend clocking...
-- Radio 1x clock:200
-- [DMA FIFO] Running BIST for FIFO 0... pass (Throughput: 1185.3MB/s)
-- [DMA FIFO] Running BIST for FIFO 1... pass (Throughput: 1176.6MB/s)
-- [RFNoC Radio] Performing register loopback test... pass
-- [RFNoC Radio] Performing register loopback test... pass
-- [RFNoC Radio] Performing register loopback test... pass
-- [RFNoC Radio] Performing register loopback test... pass

UHD Error:
    The daughterboard manager encountered a recoverable error in init.
    Loading the "unknown" daughterboard implementations to continue.
    The daughterboard cannot operate until this error is resolved.
    RuntimeError: NotImplementedError: x3xx set dboard clock rate does not
support changing the clock rate
-- Performing timer loopback test... pass

UHD Error:
    The daughterboard manager encountered a recoverable error in init.
    Loading the "unknown" daughterboard implementations to continue.
    The daughterboard cannot operate until this error is resolved.
    RuntimeError: NotImplementedError: x3xx set dboard clock rate does not
support changing the clock rate
-- Performing timer loopback test... pass
 _____________________________________________________
 /
|       Device: X-Series Device
|     _____________________________________________________
|    /
|   |       Mboard: X310
|   |   revision: 24
|   |   revision_compat: 7
|   |   product: 30818
|   |   mac-addr0: 00:80:2f:23:41:c5
|   |   mac-addr1: 00:80:2f:23:41:c6
|   |   gateway: 192.168.10.1
|   |   ip-addr0: 192.168.100.2
|   |   subnet0: 255.255.255.0
|   |   ip-addr1: 192.168.20.2
|   |   subnet1: 255.255.255.0
|   |   ip-addr2: 192.168.30.2
|   |   subnet2: 255.255.255.0
|   |   ip-addr3: 192.168.40.2
|   |   subnet3: 255.255.255.0
|   |   serial: 30B867A
|   |   FW Version: 5.0
|   |   FPGA Version: 33.0
|   |   RFNoC capable: Yes
|   |
|   |   Time sources:  internal, external, gpsdo
|   |   Clock sources: internal, external, gpsdo
|   |   Sensors: ref_locked
|   |     _____________________________________________________
|   |    /
|   |   |       RX Dboard: A
|   |   |   ID: XCVR2450, XCVR2450 - r2.1 (0x0061)
|   |   |   Serial: 30656DD
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Frontend: 0
|   |   |   |   Name: Unknown (0xffff) - 0
|   |   |   |   Antennas:
|   |   |   |   Sensors:
|   |   |   |   Freq range: 0.000 to 0.000 MHz
|   |   |   |   Gain Elements: None
|   |   |   |   Bandwidth range: 0.0 to 0.0 step 0.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Codec: A
|   |   |   |   Name: ads62p48
|   |   |   |   Gain range digital: 0.0 to 6.0 step 0.5 dB



uhd version:003.010.001.000

Any suggestion is welcome

thank you.

best regards
Jon
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