And if the below approach is allowed (a probe seems to run fine now),
would that be causing the following errors when I try to run my
flowgraph (RFNoC:dataGenerator -> RFNoC:FIFO -> RFNoC:Radio):
[32;1m[INFO] [UHD] [39;0mlinux; GNU C++ version 4.8.4; Boost_105400;
UHD_4.0.0.rfnoc-devel-348-g2c2e1a99
[32;1m[INFO] [X300] [39;0mX300 initialization sequence...
[32;1m[INFO] [X300] [39;0mDetermining maximum frame size...
[32;1m[INFO] [X300] [39;0mMaximum frame size: 2072 bytes.
[32;1m[INFO] [X300] [39;0mSetup basic communication...
[32;1m[INFO] [X300] [39;0mLoading values from EEPROM...
[32;1m[INFO] [X300] [39;0mSetup RF frontend clocking...
[32;1m[INFO] [X300] [39;0mRadio 1x clock:200
[32;1m[INFO] [X300] [39;0mDetecting internal GPSDO....
[32;1m[INFO] [GPS] [39;0mFound an internal GPSDO: LC_XO, Firmware Rev
0.929a
[31;0m[ERROR] [RFNOC] [39;0m[CE_00_Port_30] Block ctrl bad VITA
packet: ValueError: Bad CHDR or packet fragment
[32;1m[INFO] [RFNOC] [39;0m0808550E
[32;1m[INFO] [RFNOC] [39;0m00000000
[32;1m[INFO] [RFNOC] [39;0m05BAFC00
[32;1m[INFO] [RFNOC] [39;0m06BAFC00
[31;0m[ERROR] [RFNOC] [39;0m[CE_00_Port_30] Block ctrl bad VITA
packet: ValueError: Bad CHDR or packet fragment
[32;1m[INFO] [RFNOC] [39;0m0808560E
[32;1m[INFO] [RFNOC] [39;0m00000000
[32;1m[INFO] [RFNOC] [39;0m05BCFC00
[32;1m[INFO] [RFNOC] [39;0m06BCFC00
[31;0m[ERROR] [UHD] [39;0mException caught in safe-call.
in virtual ctrl_iface_impl::~ctrl_iface_impl()
at /home/jmat/rfnoc/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
this->peek32(0); -> EnvironmentError: IOError: Block ctrl
(CE_00_Port_30) packet parse error - EnvironmentError: IOError: Expected
SID: 02:30>00:00 Received SID: 00:00>00:00
Traceback (most recent call last):
File "/home/jmat/rfnoc-nocblocks/examples/data_generator.py", line
171, in <module>
main()
File "/home/jmat/rfnoc-nocblocks/examples/data_generator.py", line
159, in main
tb = top_block_cls()
File "/home/jmat/rfnoc-nocblocks/examples/data_generator.py", line
61, in __init__
self.device3 = variable_uhd_device3_0 =
ettus.device3(uhd.device_addr_t( ",".join(('type=x300',
"master_clock_rate=200e6,addr=10.0.0.10")) ))
File
"/home/jmat/rfnoc/lib/python2.7/dist-packages/ettus/ettus_swig.py", line
1291, in make
return _ettus_swig.device3_make(*args, **kwargs)
RuntimeError: EnvironmentError: IOError: Block ctrl (CE_00_Port_30)
packet parse error - EnvironmentError: IOError: Expected SID:
02:30>00:00 Received SID: 00:00>00:00
>>> Done
On 07/13/2017 03:15 PM, Jason Matusiak wrote:
I have a block that I want to essentially be a source block in RFNoC
(outputting data from a ROM), but when I go to probe, I get this error:
RuntimeError: LookupError: Path not found in tree:
/mboards/0/xbar/dataGenerator_0/ports/in
Is this because I set it up without sink input? Is there any way
around it? I think the solution is to put a sink in the rfnoc/blocks/
XML file but NOT the grc XML file, is that right?
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