Coreboot uses this controller to implement GPIO access.

Signed-off-by: Simon Glass <s...@chromium.org>
---
 include/configs/coreboot.h |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index 0e89242..2e084ee 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -99,6 +99,9 @@
 #undef CONFIG_VIDEO
 #undef CONFIG_CFB_CONSOLE
 
+/* x86 GPIOs are accessed through a PCI device */
+#define CONFIG_INTEL_ICH6_GPIO
+
 /*-----------------------------------------------------------------------
  * Command line configuration.
  */
-- 
1.7.7.3

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