On 01/09/2012 04:07, Marek Vasut wrote: > This patch fixes dcache-related problem. The problem manifested > when dcache was enabled and the following command issued twice: > > mw 0x42000000 0 0x4000 ; sf probe ; sf read 0x42000000 0x0 0x10000 ; sha1sum > 0x42000000 0x10000 > > The SHA1 checksum was correct during the first call. Yet with > every subsequent call of the above command, it differed and was > wrong. > > It turns out this was because of a race condition. On the first > time the command was called, no cacheline contained any data from > the destination memory location. The DMA transfered data into the > location and the cache above the location was invalidated. Then the > checksum was computed, but that meant the data were loaded into data > cache. > > On any subsequent call, the DMA again transfered data into the same > destination. Yet during the transfer, some of the DCache lines were > evicted and written back into the main memory. Once the DMA transfer > completed, the data cache was invalidated over the memory location as > usual. But the data that were to be loaded back into the data cache > by subsequent SHA1 checksuming were corrupted. > > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Fabio Estevam <feste...@gmail.com> > Cc: Otavio Salvador <ota...@ossystems.com.br> > Cc: Stefano Babic <sba...@denx.de> > ---
Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de ===================================================================== _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
