Align the SSP clock speed with oscilator to achieve higher transfer
stability.
Signed-off-by: Otavio Salvador <ota...@ossystems.com.br>
---
Changes in v2:
- reword commit log to match the change description done on m28evk.
board/freescale/mx28evk/mx28evk.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mx28evk/mx28evk.c
b/board/freescale/mx28evk/mx28evk.c
index 867d3c8..d782aea 100644
--- a/board/freescale/mx28evk/mx28evk.c
+++ b/board/freescale/mx28evk/mx28evk.c
@@ -49,8 +49,8 @@ int board_early_init_f(void)
/* SSP0 clock at 96MHz */
mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
- /* SSP2 clock at 96MHz */
- mx28_set_sspclk(MXC_SSPCLK2, 96000, 0);
+ /* SSP2 clock at 160MHz */
+ mx28_set_sspclk(MXC_SSPCLK2, 160000, 0);
#ifdef CONFIG_CMD_USB
mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT);
--
1.7.10.4
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