E6500 doesn't allow cache inhibit TLB alias. Use the boot page translation
instead. The boot page is always cache inhibit.
Signed-off-by: York Sun <york...@freescale.com>
---
arch/powerpc/cpu/mpc85xx/mp.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index ffc2a9a..594f8e8 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -205,7 +205,7 @@ ulong get_spin_phys_addr(void)
extern ulong __secondary_start_page;
extern ulong __spin_table;
- return (determine_mp_bootpg() +
+ return (0xfffff000 +
(ulong)&__spin_table - (ulong)&__secondary_start_page);
}
--
1.7.0.4
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