On Wed, 2012-08-22 at 11:18 -0500, Andy Fleming wrote:
> On Fri, Aug 17, 2012 at 1:27 PM, York Sun <york...@freescale.com> wrote:
> > The QCSP registers are at offset 0x1000 for SoCs with QMan v3.
> >
> > Signed-off-by: York Sun <york...@freescale.com>
> > ---
> > arch/powerpc/include/asm/immap_85xx.h | 19 ++++++++++++++++++-
> > 1 files changed, 18 insertions(+), 1 deletions(-)
> >
> > diff --git a/arch/powerpc/include/asm/immap_85xx.h
> > b/arch/powerpc/include/asm/immap_85xx.h
> > index 15d2db4..20e6915 100644
> > --- a/arch/powerpc/include/asm/immap_85xx.h
> > +++ b/arch/powerpc/include/asm/immap_85xx.h
> > @@ -2573,13 +2573,18 @@ typedef struct ccsr_sec {
> > #endif
> >
> > typedef struct ccsr_qman {
> > +#ifdef CONFIG_SYS_FSL_QMAN_V3
> > + /* T4240, PSC9164 */
>
>
> B4860 is the name, not PSC9164
Thanks for pointing out. This patch was written when the name was
PSC9164. I will fix it in next version, along with other feedback.
York
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