On 08/12/2012 11:28 PM, R, Sricharan wrote:
> Hi Tom,
> On Thu, Aug 9, 2012 at 9:31 PM, Tom Rini <tr...@ti.com> wrote:
>> Make the lowlevel_init function that these platforms have which just
>> sets up the stack and calls a C function available to all armv7
>> platforms. As part of this we change some of the macros that are used
>> to be more clear. Previously (except for am335x evm) we had been
>> setting CONFIG_SYS_INIT_SP_ADDR to a series of new defines that are
>> equivalent to simply referencing NON_SECURE_SRAM_END. On am335x evm we
>> should have been doing this initially and do now.
>>
>> Cc: Sricharan R <r.sricha...@ti.com>
>> Signed-off-by: Tom Rini <tr...@ti.com>
>> ---
>> arch/arm/cpu/armv7/Makefile | 6 ++-
>> arch/arm/cpu/armv7/lowlevel_init.S | 50
>> ++++++++++++++++++++++++
>> arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 18 ---------
>> arch/arm/include/asm/arch-am33xx/hardware.h | 3 +-
>> arch/arm/include/asm/arch-am33xx/omap.h | 1 -
>> arch/arm/include/asm/arch-omap4/omap.h | 1 -
>> arch/arm/include/asm/arch-omap5/omap.h | 2 -
>> include/configs/am335x_evm.h | 4 +-
>> include/configs/omap4_common.h | 7 +---
>> include/configs/omap5_evm.h | 7 +---
>> 10 files changed, 63 insertions(+), 36 deletions(-)
>> create mode 100644 arch/arm/cpu/armv7/lowlevel_init.S
>>
>> diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
>> index 6b2addc..788eada 100644
>> --- a/arch/arm/cpu/armv7/Makefile
>> +++ b/arch/arm/cpu/armv7/Makefile
>> @@ -32,8 +32,12 @@ COBJS += cache_v7.o
>> COBJS += cpu.o
>> COBJS += syslib.o
>>
>> +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
>> +SOBJS += lowlevel_init.o
>> +endif
>> +
>> SRCS := $(START:.o=.S) $(COBJS:.o=.c)
>> -OBJS := $(addprefix $(obj),$(COBJS))
>> +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
>> START := $(addprefix $(obj),$(START))
>>
>> all: $(obj).depend $(START) $(LIB)
>> diff --git a/arch/arm/cpu/armv7/lowlevel_init.S
>> b/arch/arm/cpu/armv7/lowlevel_init.S
>> new file mode 100644
>> index 0000000..ef04575
>> --- /dev/null
>> +++ b/arch/arm/cpu/armv7/lowlevel_init.S
>> @@ -0,0 +1,50 @@
>> +/*
>> + * A lowlevel_init function that sets up the stack to call a C function to
>> + * perform further init.
>> + *
>> + * (C) Copyright 2010
>> + * Texas Instruments, <www.ti.com>
>> + *
>> + * Author :
>> + * Aneesh V <ane...@ti.com>
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +#include <asm-offsets.h>
>> +#include <config.h>
>> +#include <linux/linkage.h>
>> +
>> +ENTRY(lowlevel_init)
>> + /*
>> + * Setup a temporary stack
>> + */
>> + ldr sp, =CONFIG_SYS_INIT_SP_ADDR
>> +
>> + /*
>> + * Save the old lr(passed in ip) and the current lr to stack
>> + */
>> + push {ip, lr}
>> +
>> + /*
>> + * go setup pll, mux, memory
>> + */
>> + bl s_init
>> + pop {ip, pc}
>> +ENDPROC(lowlevel_init)
>> diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
>> b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
>> index ccc6bb6..1ece073 100644
>> --- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
>> +++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S
>> @@ -78,24 +78,6 @@ ENTRY(save_boot_params)
>> bx lr
>> ENDPROC(save_boot_params)
>>
>> -ENTRY(lowlevel_init)
>> - /*
>> - * Setup a temporary stack
>> - */
>> - ldr sp, =LOW_LEVEL_SRAM_STACK
>> -
>> - /*
>> - * Save the old lr(passed in ip) and the current lr to stack
>> - */
>> - push {ip, lr}
>> -
>> - /*
>> - * go setup pll, mux, memory
>> - */
>> - bl s_init
>> - pop {ip, pc}
>> -ENDPROC(lowlevel_init)
>> -
>> ENTRY(set_pl310_ctrl_reg)
>> PUSH {r4-r11, lr} @ save registers - ROM code may pollute
>> @ our registers
>> diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h
>> b/arch/arm/include/asm/arch-am33xx/hardware.h
>> index c617331..62332f2 100644
>> --- a/arch/arm/include/asm/arch-am33xx/hardware.h
>> +++ b/arch/arm/include/asm/arch-am33xx/hardware.h
>> @@ -19,8 +19,9 @@
>> #ifndef __AM33XX_HARDWARE_H
>> #define __AM33XX_HARDWARE_H
>>
>> +#include <asm/arch/omap.h>
>> +
>> /* Module base addresses */
>> -#define LOW_LEVEL_SRAM_STACK 0x4030B7FC
>> #define UART0_BASE 0x44E09000
>>
>> /* DM Timer base addresses */
>> diff --git a/arch/arm/include/asm/arch-am33xx/omap.h
>> b/arch/arm/include/asm/arch-am33xx/omap.h
>> index fc2b7a5..850f8a5 100644
>> --- a/arch/arm/include/asm/arch-am33xx/omap.h
>> +++ b/arch/arm/include/asm/arch-am33xx/omap.h
>> @@ -30,7 +30,6 @@
>> */
>> #define NON_SECURE_SRAM_START 0x40304000
>> #define NON_SECURE_SRAM_END 0x4030E000
>> -#define LOW_LEVEL_SRAM_STACK 0x4030B7FC
>>
>> /* ROM code defines */
>> /* Boot device */
>> diff --git a/arch/arm/include/asm/arch-omap4/omap.h
>> b/arch/arm/include/asm/arch-omap4/omap.h
>> index 03bd923..d4b5076 100644
>> --- a/arch/arm/include/asm/arch-omap4/omap.h
>> +++ b/arch/arm/include/asm/arch-omap4/omap.h
>> @@ -172,7 +172,6 @@ struct control_lpddr2io_regs {
>> /* base address for indirect vectors (internal boot mode) */
>> #define SRAM_ROM_VECT_BASE 0x4030D000
>> /* Temporary SRAM stack used while low level init is done */
>> -#define LOW_LEVEL_SRAM_STACK NON_SECURE_SRAM_END
>> #define SRAM_SCRATCH_SPACE_ADDR NON_SECURE_SRAM_START
>> /* SRAM scratch space entries */
>> #define OMAP4_SRAM_SCRATCH_OMAP4_REV SRAM_SCRATCH_SPACE_ADDR
>> diff --git a/arch/arm/include/asm/arch-omap5/omap.h
>> b/arch/arm/include/asm/arch-omap5/omap.h
>> index 7f05cb5..9dce49a 100644
>> --- a/arch/arm/include/asm/arch-omap5/omap.h
>> +++ b/arch/arm/include/asm/arch-omap5/omap.h
>> @@ -262,8 +262,6 @@ struct omap_sys_ctrl_regs {
>> #define NON_SECURE_SRAM_END 0x40320000 /* Not inclusive */
>> /* base address for indirect vectors (internal boot mode) */
>> #define SRAM_ROM_VECT_BASE 0x4031F000
>> -/* Temporary SRAM stack used while low level init is done */
>> -#define LOW_LEVEL_SRAM_STACK NON_SECURE_SRAM_END
>>
>> #define SRAM_SCRATCH_SPACE_ADDR NON_SECURE_SRAM_START
>> /*
>> diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
>> index 2bfe8c6..a8a6b8e 100644
>> --- a/include/configs/am335x_evm.h
>> +++ b/include/configs/am335x_evm.h
>> @@ -148,7 +148,7 @@
>> #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
>>
>> #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
>> -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
>> +#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
>> GENERATED_GBL_DATA_SIZE)
>> /* Platform/Board specific defs */
>> #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
>> @@ -195,7 +195,7 @@
>> #define CONFIG_SPL
>> #define CONFIG_SPL_TEXT_BASE 0x402F0400
>> #define CONFIG_SPL_MAX_SIZE (46 * 1024)
>> -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
>> +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
>>
>> #define CONFIG_SPL_BSS_START_ADDR 0x80000000
>> #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
>> diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
>> index 6f298a1..2771839 100644
>> --- a/include/configs/omap4_common.h
>> +++ b/include/configs/omap4_common.h
>> @@ -225,10 +225,7 @@
>> #define CONFIG_NR_DRAM_BANKS 1
>>
>> #define CONFIG_SYS_SDRAM_BASE 0x80000000
>> -#define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800
>> -#define CONFIG_SYS_INIT_RAM_SIZE 0x800
>> -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
>> - CONFIG_SYS_INIT_RAM_SIZE - \
>> +#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
>> GENERATED_GBL_DATA_SIZE)
>>
>> #ifndef CONFIG_SYS_L2CACHE_OFF
>> @@ -249,7 +246,7 @@
>> #define CONFIG_SPL
>> #define CONFIG_SPL_TEXT_BASE 0x40304350
>> #define CONFIG_SPL_MAX_SIZE (38 * 1024)
>> -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
>> +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
>>
>> /*
>> * 64 bytes before this address should be set aside for u-boot.img's
>> diff --git a/include/configs/omap5_evm.h b/include/configs/omap5_evm.h
>> index 0884280..4d6de16 100644
>> --- a/include/configs/omap5_evm.h
>> +++ b/include/configs/omap5_evm.h
>> @@ -228,10 +228,7 @@
>> #define CONFIG_NR_DRAM_BANKS 1
>>
>> #define CONFIG_SYS_SDRAM_BASE 0x80000000
>> -#define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800
>> -#define CONFIG_SYS_INIT_RAM_SIZE 0x800
>> -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
>> - CONFIG_SYS_INIT_RAM_SIZE - \
>> +#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
>> GENERATED_GBL_DATA_SIZE)
>>
>> #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
>> @@ -246,7 +243,7 @@
>> #define CONFIG_SPL
>> #define CONFIG_SPL_TEXT_BASE 0x40300350
>> #define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */
>> -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
>> +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
>>
>> #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address
>> 0x60000 */
>> #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
>
> Looks fine cleanup for me.
> A small concern now is the size of available SRAM for
> SPL text is now reduced by GENERATED_GBL_DATA_SIZE, though it is small.
> SRAM size available for SPL code is a concern in OMAP4 platforms.
> Do you prefer keeping CONFIG_SPL_STACK to NON_SECURE_SRAM_END ?
Yes, I would like to keep everyone on the same defines here. 128 bytes
is enough that we can make it up elsewhere (for example re-factoring
emif-common.c as the ddr3 stuff can't be link-time garbage collected but
could be build-time disabled or simply never linked).
--
Tom
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