Read configuration from DTB.
Signed-off-by: Michal Simek <mon...@monstr.eu>
---
arch/microblaze/cpu/timer.c | 25 +++++++++++++++++++++++++
1 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c
index dfaaaf5..91ca42b 100644
--- a/arch/microblaze/cpu/timer.c
+++ b/arch/microblaze/cpu/timer.c
@@ -25,6 +25,9 @@
#include <common.h>
#include <asm/microblaze_timer.h>
#include <asm/microblaze_intc.h>
+#include <fdtdec.h>
+
+DECLARE_GLOBAL_DATA_PTR;
volatile int timestamp = 0;
microblaze_timer_t *tmr;
@@ -62,11 +65,33 @@ int timer_init (void)
u32 preload = 0;
u32 ret = 0;
+#ifndef CONFIG_OF_CONTROL
#if defined(CONFIG_SYS_TIMER_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM)
preload = XILINX_CLOCK_FREQ / CONFIG_SYS_HZ;
irq = CONFIG_SYS_TIMER_0_IRQ;
tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR);
#endif
+#else
+ int temp;
+ int offset = 0;
+
+ offset = fdt_node_offset_by_compatible(gd->fdt_blob, offset,
+ "xlnx,xps-timer-1.00.a");
+ if (offset > 0) {
+ temp = fdtdec_get_addr(gd->fdt_blob, offset, "reg");
+ if (temp != FDT_ADDR_T_NONE) {
+ tmr = (microblaze_timer_t *)temp;
+ irq = fdtdec_get_int(gd->fdt_blob, offset,
+ "interrupts", -1);
+ if (irq == -1)
+ panic("Connect IRQ to system timer\n");
+ /* Set default clock frequency */
+ temp = fdtdec_get_int(gd->fdt_blob, offset,
+ "clock-frequency", 0);
+ preload = temp / CONFIG_SYS_HZ;
+ }
+ }
+#endif
if (tmr && irq && preload) {
tmr->loadreg = preload;
--
1.7.0.4
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
