Changed CONFIG_SYS_TEXT_BASE to actual address (required for
board_init_f) and moved it into cm4008.h, along with a warning that it
must match PHYS_FLASH_1 (since lowlevel_init relocates there).

Signed-off-by: Yann Vernier <yann.vern...@orsoc.se>
---
 arch/arm/cpu/arm920t/ks8695/lowlevel_init.S |    9 +++++++--
 board/cm4008/config.mk                      |    1 -
 include/configs/cm4008.h                    |    3 +++
 3 files changed, 10 insertions(+), 3 deletions(-)
 delete mode 100644 board/cm4008/config.mk

diff --git a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S 
b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
index e9f1227..8986e58 100644
--- a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
+++ b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
@@ -92,11 +92,16 @@ lowlevel_init:
         * ram from address 0, and flash at 32MB.
         */
        ldr     r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL0)
+        /* Remap flash memory to 768MB size, such that it covers
+           both 0 (boot) and 512MB (run) regions */
        ldr     r2, =0xbfc00040
        str     r2, [r1]                /* large flash map */
-       ldr     pc, =(highflash+0x02000000-0x00f00000)  /* jump to high flash 
address */
+        /* Relies on PHYS_FLASH_1==CONFIG_SYS_TEXT_BASE */
+       ldr     pc, =(highflash)        /* jump to high flash address */
 highflash:
-       ldr     r2, =0x8fe00040
+        /* Move ROM to high address, and reconfigure to 4MiB size */
+       ldr     r2, =(((PHYS_FLASH_1+0x3f0000)<<(22-16))|  \
+                      (PHYS_FLASH_1>>(16-12))|0x40)
        str     r2, [r1]                /* remap flash range */
 
        /*
diff --git a/board/cm4008/config.mk b/board/cm4008/config.mk
deleted file mode 100644
index 0d5923b..0000000
--- a/board/cm4008/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x00f00000
diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h
index 81e4de4..7c2e113 100644
--- a/include/configs/cm4008.h
+++ b/include/configs/cm4008.h
@@ -118,6 +118,9 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR        0x00020000 /* lowest 128k of RAM */
 
+/* CONFIG_SYS_TEXT_BASE and PHYS_FLASH_1 must match for both
+   relocation in lowlevel_init.S and function array in board.c */
+#define CONFIG_SYS_TEXT_BASE    0x02000000
 #define PHYS_FLASH_1           0x02000000 /* Flash Bank #1 */
 #define PHYS_FLASH_SECT_SIZE    0x00020000 /* 128 KB sectors (x1) */
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
-- 
1.7.10


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