Signed-off-by: Vikram Narayanan <vikram...@gmail.com>
Cc: Stephen Warren <swar...@wwwdotorg.org>
Cc: Albert Aribaud <albert.u.b...@aribaud.net>
---
arch/arm/include/asm/arch-bcm2835/gpio.h | 49 +++++++++++
drivers/gpio/Makefile | 1 +
drivers/gpio/rpi_gpio.c | 128 ++++++++++++++++++++++++++++++
3 files changed, 178 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-bcm2835/gpio.h
create mode 100644 drivers/gpio/rpi_gpio.c
diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h
b/arch/arm/include/asm/arch-bcm2835/gpio.h
new file mode 100644
index 0000000..3cba0fb
--- /dev/null
+++ b/arch/arm/include/asm/arch-bcm2835/gpio.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2012 Vikram Narayananan
+ * <vikram...@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BCM2835_GPIO_H_
+#define _BCM2835_GPIO_H_
+
+#define BCM2835_GPIO_BASE (0x7E200000)
+#define BCM2835_MAX_GPIOS 53
+
+#define BCM2835_GPIO_FSEL_CLR_MASK (0x7)
+#define BCM2835_GPIO_OUTPUT (0x1)
+
+#define GPIO_TO_BANK(n) (n / 10)
+#define GPIO_TO_PIN(n) (n % 10)
+
+struct bcm_gpio_regs {
+ u32 gpfsel[6];
+ u32 reserved1;
+ u32 gpset0;
+ u32 gpset1;
+ u32 reserved2;
+ u32 gpclr0;
+ u32 gpclr1;
+ u32 reserved3;
+ u32 gplev0;
+ u32 gplev1;
+};
+
+#endif /* _BCM2835_GPIO_H_ */
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index fb3b09a..b042c46 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -39,6 +39,7 @@ COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o
COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o
COBJS-$(CONFIG_ALTERA_PIO) += altera_pio.o
COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
+COBJS-$(CONFIG_BCM2835_GPIO) += rpi_gpio.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/gpio/rpi_gpio.c b/drivers/gpio/rpi_gpio.c
new file mode 100644
index 0000000..c2b547f
--- /dev/null
+++ b/drivers/gpio/rpi_gpio.c
@@ -0,0 +1,128 @@
+/*
+ * Copyright (C) 2012 Vikram Narayananan
+ * <vikram...@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+
+struct bcm_gpio {
+ u32 bank;
+ u32 pin;
+};
+
+inline int gpio_is_valid(unsigned gpio)
+{
+ return (gpio > BCM2835_MAX_GPIOS) ? 0 : 1;
+}
+
+static int get_bank_pin(unsigned gpio, struct bcm_gpio *pio)
+{
+ int bank = GPIO_TO_BANK(gpio);
+ int pin = GPIO_TO_PIN(gpio);
+
+ if (!gpio_is_valid(gpio))
+ return -1;
+
+ pin &= 0x09;
+ pio->pin = pin;
+ pio->bank = bank;
+ return 0;
+}
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ return (gpio_is_valid(gpio)) ? 1 : 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ struct bcm_gpio pio;
+ struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
+ unsigned val = 0;
+
+ if (get_bank_pin(gpio, &pio))
+ return -1;
+
+ val = readl(®->gpfsel[pio.bank]);
+ val &= ~(BCM2835_GPIO_FSEL_CLR_MASK << (pio.pin * 3));
+ writel(val, reg->gpfsel[pio.bank]);
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ struct bcm_gpio pio;
+ struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
+ unsigned val = 0;
+
+ if (get_bank_pin(gpio, &pio))
+ return -1;
+
+ val = readl(®->gpfsel[pio.bank]);
+ val &= ~(BCM2835_GPIO_FSEL_CLR_MASK << (pio.pin * 3));
+ val |= (BCM2835_GPIO_OUTPUT << (pio.pin * 3));
+ writel(val, reg->gpfsel[pio.bank]);
+
+ if (value)
+ gpio_set_value(gpio, value);
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
+ unsigned val = 0;
+
+ if (!gpio_is_valid(gpio))
+ return -1;
+
+ val = (gpio < 32) ? readl(®->gplev0) : readl(®->gplev1);
+ gpio &= 0x1f;
+
+ return (val & (1 << gpio)) >> gpio;
+}
+
+int gpio_set_value(unsigned gpio, int value)
+{
+ struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
+
+ if (!gpio_is_valid(gpio))
+ return -1;
+
+ if (gpio < 32) {
+ if (value)
+ writel((1 << gpio), reg->gpset0);
+ else
+ writel((1 << gpio), reg->gpclr0);
+ } else {
+ gpio &= 0x1f;
+ if (value)
+ writel((1 << pin), reg->gpset1);
+ else
+ writel((1 << pin), reg->gpclr1);
+ }
+ return 0;
+}
--
1.7.4.1
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