Dear Stefano Babic,
> On 18/06/2012 16:23, Marek Vasut wrote:
> > Dear Fabio Estevam,
> >
> >> Hi Marek,
> >>
> >> On Thu, May 31, 2012 at 3:45 PM, Marek Vasut <ma...@denx.de> wrote:
> >>> Call this or similar in your spl_boot.c to adjust the DRAM
> >>> configuration. Actually I think even the following value should fix
> >>> your problem:
> >>>
> >>> void mx28_adjust_memory_params(uint32_t *dram_vals)
> >>> {
> >>>
> >>> dram_vals[0x74 >> 2] = 0x0f02010a;
> >>>
> >>> }
> >>
> >> I finally had a chance to try this and my mx28evk can boot again with
> >> your patch + the code above.
> >>
> >> How do we handle this? Would you send a v2 with this additional code
> >> or should I do it myself after your original patch in this thread gets
> >> applied?
> >
> > Stefano, can you please apply this? So Fabio can apply his on top of it?
>
> I do it.
>
> >> Also, please explain to the mortal folks what 'dram_vals[0x74 >> 2] =
> >> 0x0f02010a;' means.
> >
> > Well, check that particular register (memory configuration register at
> > +0x74 offset) in the datasheet. It's basically adjusting the number of
> > enabled address row and columns.
> >
> >> It is not something very trivial to figure out :-)
> >
> > It actually is, see above ;-)
>
> I see, but I will never apply a patch programmed in hexadecimal instead
> of plain C ;-)
So ... what do you expect me to do? The register is called HW_DRAM_CTL29 (very
descriptive) ... do you want me to create a file full of HW_DRAM_CTLnn ?
>
> Stefano
Best regards,
Marek Vasut
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