Hi Allen,
On Fri, Jun 8, 2012 at 2:16 PM, Allen Martin <amar...@nvidia.com> wrote:
> Move warmboot_save_sdram_params() to later in the boot sequence. This
> code relies on devicetree to get the address of the memory controller
> and with upcoming changes for SPL boot it gets called early in the
> boot process when devicetree is not initialized yet.
>
In fact I suppose you could move it much later to board_init() or even into
the warmboot setup code there. Putting it in dram_init() might not be the
best place.
>
> Signed-off-by: Allen Martin <amar...@nvidia.com>
> ---
> arch/arm/cpu/tegra20-common/ap20.c | 5 -----
> arch/arm/cpu/tegra20-common/board.c | 5 +++++
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/cpu/tegra20-common/ap20.c
> b/arch/arm/cpu/tegra20-common/ap20.c
> index 8b6afbc..6ff71e0 100644
> --- a/arch/arm/cpu/tegra20-common/ap20.c
> +++ b/arch/arm/cpu/tegra20-common/ap20.c
> @@ -345,11 +345,6 @@ void init_pmc_scratch(void)
> /* ODMDATA is for kernel use to determine RAM size, LP config, etc.
> */
> odmdata = get_odmdata();
> writel(odmdata, &pmc->pmc_scratch20);
> -
> -#ifdef CONFIG_TEGRA20_LP0
> - /* save Sdram params to PMC 2, 4, and 24 for WB0 */
> - warmboot_save_sdram_params();
> -#endif
> }
>
> void tegra20_start(void)
> diff --git a/arch/arm/cpu/tegra20-common/board.c
> b/arch/arm/cpu/tegra20-common/board.c
> index e595ff9..70e5373 100644
> --- a/arch/arm/cpu/tegra20-common/board.c
> +++ b/arch/arm/cpu/tegra20-common/board.c
> @@ -69,6 +69,11 @@ int dram_init(void)
> {
> /* We do not initialise DRAM here. We just query the size */
> gd->ram_size = query_sdram_size();
> +
> +#ifdef CONFIG_TEGRA20_LP0
> + /* save Sdram params to PMC 2, 4, and 24 for WB0 */
> + warmboot_save_sdram_params();
> +#endif
> return 0;
> }
>
> --
> 1.7.9.5
>
> Regards,
Simon
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