Abstract out common register setup. This also configured r_cntrl
to correct value at registration time.
Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Detlev Zundel <d...@denx.de>
Cc: Fabio Estevam <fabio.este...@freescale.com>
Cc: Stefano Babic <sba...@denx.de>
Cc: Wolfgang Denk <w...@denx.de>
---
drivers/net/fec_mxc.c | 84 ++++++++++++++++++++++---------------------------
1 file changed, 38 insertions(+), 46 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index d8db9f0..04750c5 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -398,6 +398,42 @@ static void fec_eth_phy_config(struct eth_device *dev)
#endif
}
+/*
+ * Do initial configuration of the FEC registers
+ */
+static void fec_reg_setup(struct fec_priv *fec)
+{
+ uint32_t rcntrl;
+
+ /*
+ * Set interrupt mask register
+ */
+ writel(0x00000000, &fec->eth->imask);
+
+ /*
+ * Clear FEC-Lite interrupt event register(IEVENT)
+ */
+ writel(0xffffffff, &fec->eth->ievent);
+
+
+ /*
+ * Set FEC-Lite receive control register(R_CNTRL):
+ */
+
+ /* Start with frame length = 1518, common for all modes. */
+ rcntrl = PKTSIZE << FEC_RCNTRL_MAX_FL_SHIFT;
+ if (fec->xcv_type == SEVENWIRE)
+ rcntrl |= FEC_RCNTRL_FCE;
+ else if (fec->xcv_type == RGMII)
+ rcntrl |= FEC_RCNTRL_RGMII;
+ else if (fec->xcv_type == RMII)
+ rcntrl |= FEC_RCNTRL_RMII;
+ else /* MII mode */
+ rcntrl |= FEC_RCNTRL_FCE | FEC_RCNTRL_MII_MODE;
+
+ writel(rcntrl, &fec->eth->r_cntrl);
+}
+
/**
* Start the FEC engine
* @param[in] dev Our device to handle
@@ -512,7 +548,6 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
{
struct fec_priv *fec = (struct fec_priv *)dev->priv;
uint32_t mib_ptr = (uint32_t)&fec->eth->rmon_t_drop;
- uint32_t rcntrl;
uint32_t size;
int i, ret;
@@ -560,33 +595,7 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
(unsigned)fec->rbd_base + size);
}
- /*
- * Set interrupt mask register
- */
- writel(0x00000000, &fec->eth->imask);
-
- /*
- * Clear FEC-Lite interrupt event register(IEVENT)
- */
- writel(0xffffffff, &fec->eth->ievent);
-
-
- /*
- * Set FEC-Lite receive control register(R_CNTRL):
- */
-
- /* Start with frame length = 1518, common for all modes. */
- rcntrl = PKTSIZE << FEC_RCNTRL_MAX_FL_SHIFT;
- if (fec->xcv_type == SEVENWIRE)
- rcntrl |= FEC_RCNTRL_FCE;
- else if (fec->xcv_type == RGMII)
- rcntrl |= FEC_RCNTRL_RGMII;
- else if (fec->xcv_type == RMII)
- rcntrl |= FEC_RCNTRL_RMII;
- else /* MII mode */
- rcntrl |= FEC_RCNTRL_FCE | FEC_RCNTRL_MII_MODE;
-
- writel(rcntrl, &fec->eth->r_cntrl);
+ fec_reg_setup(fec);
if (fec->xcv_type == MII10 || fec->xcv_type == MII100)
fec_mii_setspeed(fec);
@@ -933,24 +942,7 @@ static int fec_probe(bd_t *bd, int dev_id, int phy_id,
uint32_t base_addr)
udelay(10);
}
- /*
- * Set interrupt mask register
- */
- writel(0x00000000, &fec->eth->imask);
-
- /*
- * Clear FEC-Lite interrupt event register(IEVENT)
- */
- writel(0xffffffff, &fec->eth->ievent);
-
- /*
- * Set FEC-Lite receive control register(R_CNTRL):
- */
- /*
- * Frame length=1518; MII mode;
- */
- writel((PKTSIZE << FEC_RCNTRL_MAX_FL_SHIFT) | FEC_RCNTRL_FCE |
- FEC_RCNTRL_MII_MODE, &fec->eth->r_cntrl);
+ fec_reg_setup(fec);
fec_mii_setspeed(fec);
if (dev_id == -1) {
--
1.7.10
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