Hi Wolfgang:
The following changes since commit 7b725f8485bcdd0be3cda40e435b783882bf18ec:
CHECKPATCH: ./board/esd/hh405/logo_320_240_8bpp.c (2011-12-18 00:14:46 +0100)
are available in the git repository at:
git://git.denx.de/u-boot-x86.git next
Gabe Black (7):
x86: Initial commit for running as a coreboot payload
x86: Import code from coreboot's libpayload to parse the coreboot table
x86: Clean up the x86 zimage code in preparation to extend it
x86: Add support for booting Linux using the 32 bit boot protocol
x86: Add infrastructure to extract an e820 table from the coreboot tables
x86: Refactor the zboot innards so they can be reused with a vboot image
x86: Add support for specifying an initrd with the zboot command
arch/x86/cpu/coreboot/Makefile | 58 +++++
arch/x86/cpu/coreboot/asm-offsets.c | 25 ++
arch/x86/cpu/coreboot/coreboot_car.S | 29 +++
arch/x86/cpu/coreboot/ipchecksum.c | 54 +++++
arch/x86/cpu/coreboot/sdram.c | 75 ++++++
arch/x86/cpu/coreboot/sysinfo.c | 39 +++
arch/x86/cpu/coreboot/tables.c | 183 ++++++++++++++
arch/x86/include/asm/arch-coreboot/ipchecksum.h | 37 +++
arch/x86/include/asm/arch-coreboot/sysinfo.h | 63 +++++
arch/x86/include/asm/arch-coreboot/tables.h | 241 +++++++++++++++++++
arch/x86/include/asm/zimage.h | 36 +--
arch/x86/lib/bootm.c | 21 ++-
arch/x86/lib/zimage.c | 276 ++++++++++++++--------
board/chromebook-x86/coreboot/Makefile | 53 ++++
board/chromebook-x86/coreboot/coreboot.c | 87 +++++++
board/chromebook-x86/coreboot/coreboot_pci.c | 30 +++
board/chromebook-x86/coreboot/coreboot_start.S | 29 +++
board/chromebook-x86/coreboot/coreboot_start16.S | 46 ++++
boards.cfg | 1 +
include/configs/coreboot.h | 225 ++++++++++++++++++
include/serial.h | 2 +-
21 files changed, 1482 insertions(+), 128 deletions(-)
create mode 100644 arch/x86/cpu/coreboot/Makefile
create mode 100644 arch/x86/cpu/coreboot/asm-offsets.c
create mode 100644 arch/x86/cpu/coreboot/coreboot_car.S
create mode 100644 arch/x86/cpu/coreboot/ipchecksum.c
create mode 100644 arch/x86/cpu/coreboot/sdram.c
create mode 100644 arch/x86/cpu/coreboot/sysinfo.c
create mode 100644 arch/x86/cpu/coreboot/tables.c
create mode 100644 arch/x86/include/asm/arch-coreboot/ipchecksum.h
create mode 100644 arch/x86/include/asm/arch-coreboot/sysinfo.h
create mode 100644 arch/x86/include/asm/arch-coreboot/tables.h
create mode 100644 board/chromebook-x86/coreboot/Makefile
create mode 100644 board/chromebook-x86/coreboot/coreboot.c
create mode 100644 board/chromebook-x86/coreboot/coreboot_pci.c
create mode 100644 board/chromebook-x86/coreboot/coreboot_start.S
create mode 100644 board/chromebook-x86/coreboot/coreboot_start16.S
create mode 100644 include/configs/coreboot.h
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