Thanks for the input! Putting the mux code to generic.c, as it was done for the UART's pins, did not change anything...
I write MXC_EHCI_MODE_SERIAL to &ehci->portsc. Exactly the same behavior. Same log. But the question (1) remains; which is the register (the address) of where mxc_set_usbcontrol() is supposed to write to? I understand Linux use http://lxr.linux.no/#linux+v3.1/arch/arm/mach-imx/ehci-imx25.c uses the IMX_USB_BASE + 0x600 address... But, to me this is outside the usb_ehci-struct, so I cannot figure out what register that is located at that address. Guessing, what about the following possible candidates inside the usb_echi-struct? usb_ehci->usbgenctrl usb_ehci->hwgeneral usb_ehci->control usb_ehci->isiphyctrl I need to find some docs on the controller's registers to understand that. Hugo Changes ----------- diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index c045a0b..a9752c4 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -26,6 +26,7 @@ #include <div64.h> #include <netdev.h> #include <asm/io.h> +#include <asm/gpio.h> #include <asm/arch/imx-regs.h> #include <asm/arch/imx25-pinmux.h> #ifdef CONFIG_MXC_MMC @@ -195,6 +196,30 @@ int cpu_mmc_init(bd_t *bis) #endif } +#ifdef CONFIG_USB_EHCI +void mx25_usbh2_init_pins() +{ + struct iomuxc_mux_ctl *muxctl; + struct iomuxc_pad_ctl *padctl; + u32 gpio_mux_mode5 = MX25_PIN_MUX_MODE(5); + u32 gpio_mux_mode6 = MX25_PIN_MUX_MODE(6); + + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; + + /* USBH2_PWR */ + writel(gpio_mux_mode6, &muxctl->pad_d9); + //writel(gpio_mux_mode5, &muxctl->pad_d9); + //gpio_direction_output(MXC_GPIO_PORT_TO_NUM(4, 11), 1); /* Try keep power on. */ + + /* USBH2_OC */ + writel(gpio_mux_mode6, &muxctl->pad_d8); + + /* USB_BT_CS low selects USB Host */ + writel(gpio_mux_mode5, &muxctl->pad_a21); /* GPIO2[7] */ + gpio_direction_output(MXC_GPIO_PORT_TO_NUM(2, 7), 0); /* Chip select 0*/ +} +#endif /* CONFIG_USB_EHCI */ + #ifdef CONFIG_MXC_UART void mx25_uart1_init_pins(void) { diff --git a/arch/arm/include/asm/arch-mx25/sys_proto.h b/arch/arm/include/asm/arch-mx25/sys_proto.h index 6a01a7b..0cb674a 100644 --- a/arch/arm/include/asm/arch-mx25/sys_proto.h +++ b/arch/arm/include/asm/arch-mx25/sys_proto.h @@ -24,6 +24,7 @@ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_ +void mx25_usbh2_init_pins(void); void mx25_uart1_init_pins(void); #endif diff --git a/board/freescale/mx25pdk/lowlevel_init.S b/board/freescale/mx25pdk/lowlevel_init.S index 6e6810f..1997115 100644 --- a/board/freescale/mx25pdk/lowlevel_init.S +++ b/board/freescale/mx25pdk/lowlevel_init.S @@ -15,7 +15,41 @@ * GNU General Public License for more details. */ +#include <asm/macro.h> +#include <asm/arch/macro.h> +#include <asm/arch/imx-regs.h> +#include <generated/asm-offsets.h> + +/* + * clocks + */ +.macro init_clocks + + /* disable clock output */ + write32 IMX_CCM_BASE + CCM_MCR, 0x00000000 + write32 IMX_CCM_BASE + CCM_CCTL, 0x50030000 + + /* first enable CLKO debug output + * 0x40000000 enables the debug CLKO signal + * 0x05000000 sets CLKO divider to 6 + * 0x00600000 makes CLKO parent clk the USB clk + */ + write32 0x53f80064, 0x45600000 + write32 0x53f80008, 0x20034000 + + /* + * enable all implemented clocks in all three + * clock control registers + */ + write32 IMX_CCM_BASE + CCM_CGCR0, 0x1fffffff + write32 IMX_CCM_BASE + CCM_CGCR1, 0xffffffff + write32 IMX_CCM_BASE + CCM_CGCR2, 0xfffff + + /* Devide NAND clock by 32 */ + write32 IMX_CCM_BASE + CCM_PCDR2, 0x0101011F +.endm + .globl lowlevel_init lowlevel_init: - + init_clocks mov pc, lr diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c index 4a8352f..eba70e2 100644 --- a/board/freescale/mx25pdk/mx25pdk.c +++ b/board/freescale/mx25pdk/mx25pdk.c @@ -19,10 +19,12 @@ #include <common.h> #include <asm/io.h> +#include <asm/gpio.h> #include <asm/arch/imx-regs.h> #include <asm/arch/imx25-pinmux.h> #include <asm/arch/sys_proto.h> + DECLARE_GLOBAL_DATA_PTR; int dram_init(void) @@ -36,7 +38,7 @@ int dram_init(void) int board_early_init_f(void) { mx25_uart1_init_pins(); - + mx25_usbh2_init_pins(); return 0; } diff --git a/config.mk b/config.mk index 3fa9eef..b83179c 100644 --- a/config.mk +++ b/config.mk @@ -163,8 +163,8 @@ else ARFLAGS = crv endif RELFLAGS= $(PLATFORM_RELFLAGS) -DBGFLAGS= -g # -DDEBUG -OPTFLAGS= -Os #-fomit-frame-pointer +DBGFLAGS= -g -DDEBUG +OPTFLAGS= -fno-schedule-insns -fno-schedule-insns2 #-fomit-frame-pointer OBJCFLAGS += --gap-fill=0xff diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c index a0cfbb7..85080ea 100644 --- a/drivers/usb/host/ehci-mxc.c +++ b/drivers/usb/host/ehci-mxc.c @@ -52,6 +52,8 @@ #define MX31_H1_DT_BIT (1 << 4) #endif +#define MXC_EHCI_MODE_SERIAL (3 << 30) + static int mxc_set_usbcontrol(int port, unsigned int flags) { unsigned int v; @@ -102,7 +104,7 @@ static int mxc_set_usbcontrol(int port, unsigned int flags) } #endif - writel(v, IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET); + writel(v, port); return 0; } @@ -120,7 +122,6 @@ int ehci_hcd_init(void) udelay(80); - /* Take USB2 */ ehci = (struct usb_ehci *)(IMX_USB_BASE + (0x200 * CONFIG_MXC_USB_PORT)); hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); @@ -132,7 +133,12 @@ int ehci_hcd_init(void) __raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); #endif - mxc_set_usbcontrol(CONFIG_MXC_USB_PORT, CONFIG_MXC_USB_FLAGS); + __raw_writel(MXC_EHCI_MODE_SERIAL, &ehci->portsc); + + //mxc_set_usbcontrol(&ehci->control, CONFIG_MXC_USB_FLAGS); // + //mxc_set_usbcontrol(&ehci->sictrl, CONFIG_MXC_USB_FLAGS); + //mxc_set_usbcontrol(&ehci->usbgenctrl, CONFIG_MXC_USB_FLAGS); + //mxc_set_usbcontrol(&ehci->isiphyctrl, CONFIG_MXC_USB_FLAGS); udelay(10000); diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index 8414376..b26e2bc 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -17,6 +17,7 @@ /* High Level Configuration Options */ +#define CONFIG_MX25 #define CONFIG_MX25_CLK32 32768 /* OSC32K frequency */ #define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_TEXT_BASE 0x81200000 @@ -83,6 +84,28 @@ /* U-Boot commands */ #include <config_cmd_default.h> #define CONFIG_CMD_CACHE +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* + * USB + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI /* Enable EHCI USB support */ +#define CONFIG_USB_EHCI_MXC +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_MXC_USB_PORT 2 +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_SUPPORT_VFAT +#endif /* CONFIG_CMD_USB */ + +/* + * GPIO + */ +#define CONFIG_MXC_GPIO /* Ethernet */ #define CONFIG_FEC_MXC _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
