I think reason that SW_ECC is not working, is in omap_gpmc.c: omap_nand_switch_ecc():
case NAND_ECC_SOFT: nand->ecc.mode = NAND_ECC_SOFT; /* Use mtd default settings */ nand->ecc.layout = NULL; printf("SW ECC selected\n"); The ecc struct is not setup?!? Someone has an idea? @TI stuff: if you are not the right person to address this, can you please forward? Thanks - Arno 2011/10/20 Arno Steffen <arno.stef...@googlemail.com>: > I did tests with OMAP3 uboot. The SW-ECC (testet 1 bit, 4 bit BCH) > doesn't correct errors in environment (during power-up). > Compiling uboot for default HW-ECC - correction works fine. > Testet with TI's PSP 4.02.00.07 (almost like arago latest version). > > I modified single bits by adding a patch (thanks Scott Wood) to uboot, > that allows write in raw mode to flash. Single bit error can corrected > with HW-ECC, not with SW-ECC. > This report is only about uboot environment, which is read in startup. > I didn't test it, but from my experience the correction works fine, > beside the initial reading of the environment, as for reading and > starting the kernel. > > Imho this is very critical, as reliability is suffered if a device > isn't booting. > > Best regards > Arno > > PS: > The link below refers to a previous discussion. > http://lists.denx.de/pipermail/u-boot/2011-September/100486.html > > in omap_gpmc.c I used this in board_nand_init() > > ... > nand->chip_delay = 100; > nand->ecc.mode = NAND_ECC_4BIT_SOFT; > nand_curr_device = 0; > omap_nand_switch_ecc(NAND_ECC_4BIT_SOFT, 1); > return 0; > } > _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot