Shoot, I just noticed that I forgot to purge the Gerrit generated Change-Id:
tags from the commit messages. If and when I send a v2 series I'll
remove these.
Thanks,
Anton
On Wed, Oct 12, 2011 at 2:01 PM, Anton Staaf <robot...@chromium.org> wrote:
> ARCH_DMA_MINALIGN is a new define borrowed from the Linux kernel. It is
> used to define the minimum alignement requirement for a DMA buffer. This
> series of patches ensures that it will always be defined in the arch specific
> asm/cache.h header and that asm/cache.h is included in common.h. I chose to
> add this new define instead of reusing CONFIG_SYS_CACHELINE_SIZE for two
> reasons. First, CONFIG_SYS_CACHELINE_SIZE is not defined for all
> architectures
> and thus to use it I would have to first define it correctly for all used
> architectures. I wasn't quite up to that task right now. Defining
> ARCH_DMA_MINALIGN is easier because it has slightly different semantics that
> allow it to be the maximum cacheline size known for an architecture. And
> secondly, CONFIG_SYS_CACHELINE_SIZE may not always be the correct value to use
> to align DMA buffers. In particular, on cache coherent architectures you can
> define ARCH_DMA_MINALIGN as 1 and be safe (unless there are other restrictions
> such as PCI alignment requirements).
>
> This patch set will allow me to resubmit my ALLOC_CACHE_ALIGN_BUFFER patch set
> modified to use this new define in place of CONFIG_SYS_CACHELINE_SIZE. I will
> repost those patches based on this set shortly.
>
> I have included a lot of people on CC in individual patches to double check my
> work for each architecture.
>
> I have only been able to MAKEALL for arm currently. I installed the eldk
> tools
> for PowerPC, but ran into a problem building with them:
>
> cc1: error: Do not use -Os option if --enable-target-optspace is not set.
>
> So Tested-by's would be greatly appreciated.
>
> Thanks,
> Anton
>
> Anton Staaf (12):
> arm: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
> m68k: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
> nios2: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
> powerpc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
> sh: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
> sparc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
> avr32: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
> blackfin: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
> microblaze: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
> mips: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
> x86: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
> cache: include asm/cache.h for ARCH_DMA_MINALIGN definition
>
> arch/arm/include/asm/cache.h | 11 +++++++++
> arch/avr32/include/asm/cache.h | 40
> +++++++++++++++++++++++++++++++++++
> arch/blackfin/include/asm/cache.h | 36 +++++++++++++++++++++++++++++++
> arch/m68k/include/asm/cache.h | 10 ++++++++
> arch/microblaze/include/asm/cache.h | 37 ++++++++++++++++++++++++++++++++
> arch/mips/include/asm/cache.h | 36 +++++++++++++++++++++++++++++++
> arch/nios2/include/asm/cache.h | 11 +++++++++
> arch/powerpc/include/asm/cache.h | 6 +++++
> arch/sh/include/asm/cache.h | 17 ++++++++++++++
> arch/sparc/include/asm/cache.h | 10 ++++++++
> arch/x86/include/asm/cache.h | 35 ++++++++++++++++++++++++++++++
> include/common.h | 8 +++++++
> 12 files changed, 257 insertions(+), 0 deletions(-)
> create mode 100644 arch/avr32/include/asm/cache.h
> create mode 100644 arch/blackfin/include/asm/cache.h
> create mode 100644 arch/microblaze/include/asm/cache.h
> create mode 100644 arch/mips/include/asm/cache.h
> create mode 100644 arch/x86/include/asm/cache.h
>
> --
> 1.7.3.1
>
>
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