CONFIG_SYS_CACHELINE_SIZE is supposed to be defined for all configs. But most configs do not specify it. This patch will set CONFIG_SYS_CACHELINE_SIZE to a default value equal to the GCC builtin macro __BIGGEST_ALIGNMENT__. This is not strictly correct, so it also generates a warning if the default is used.
Signed-off-by: Anton Staaf <robot...@chromium.org> Cc: Lukasz Majewski <l.majew...@samsung.com> Cc: Kyungmin Park <kyungmin.p...@samsung.com> Cc: Mike Frysinger <vap...@gentoo.org> Cc: Aneesh V <ane...@ti.com> Cc: Albert ARIBAUD <albert.u.b...@aribaud.net> Change-Id: I346afb6c417ccc9bbb353940e1819e209405986e --- include/common.h | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/include/common.h b/include/common.h index cdd76c5..9981e36 100644 --- a/include/common.h +++ b/include/common.h @@ -790,6 +790,14 @@ int cpu_release(int nr, int argc, char * const argv[]); #define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) /* + * + */ +#if !defined(CONFIG_SYS_CACHELINE_SIZE) +#warning CONFIG_SYS_CACHELINE_SIZE not defined, using __BIGGEST_ALIGNMENT__ +#define CONFIG_SYS_CACHELINE_SIZE __BIGGEST_ALIGNMENT__ +#endif + +/* * The ALLOC_CACHE_ALIGN_BUFFER macro is used to allocate a cache line size * aligned buffer on the stack. Such a buffer is useful for DMA operations * where flushing and invalidating the cache before and after a read and/or -- 1.7.3.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot