On Monday, October 03, 2011 05:52:17 AM Simon Glass wrote:
> Hi Marek,
Hi Simon,
[...]
> > +static void uart_init(void)
> > +{
> > + struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr
> > *)NV_PA_CLK_RST_BASE; + struct clk_pll *pll =
> > &clkrst->crc_pll[CLOCK_PLL_ID_PERIPH]; + uint32_t reg;
> > +
> > + reg = readl(&pll->pll_base);
> > + if (!(reg & PLL_BASE_OVRRIDE_MASK)) {
> > + /* Override pllp setup for 216MHz operation. */
> > + reg = PLL_BYPASS_MASK | PLL_BASE_OVRRIDE_MASK |
> > + (1 << PLL_DIVP_SHIFT) | (0xd << PLL_DIVM_SHIFT);
Here, read below ...
> > + reg |= (NVRM_PLLP_FIXED_FREQ_KHZ / 500) <<
> > PLL_DIVN_SHIFT; + writel(reg, &pll->pll_base);
> > +
> > + reg |= PLL_ENABLE_MASK;
> > + writel(reg, &pll->pll_base);
> > +
> > + reg &= ~PLL_BYPASS_MASK;
> > + writel(reg, &pll->pll_base);
> > + }
>
> This block of code should already be in clock.c
Well ... the 0xd is different from the common code. So maybe that should be
converted like in the PATCH 1/2 ?
>
> > +
> > +#ifdef CONFIG_TEGRA2_ENABLE_UARTA
> > + /* Assert UART reset and enable clock */
> > + reset_set_enable(PERIPH_ID_UART1, 1);
> > + clock_enable(PERIPH_ID_UART1);
> > +
> > + /* Enable pllp_out0 to UART */
> > + clrbits_le32(&clkrst->crc_clk_src_uarta, 3 << 30);
> > +
> > + /* wait for 2us */
> > + udelay(2);
> > +
> > + /* De-assert reset to UART */
> > + reset_set_enable(PERIPH_ID_UART1, 0);
> > +#endif
>
> and this should really be in board.c along with the other UARTs.
You mean nvidia/board.c ?
>
> I think there is a new set of patches which Albert was going to apply
> to the 'next' branch of ARM. Can you please track these down and take
> a look, because the above can now be simplified.
Will check.
>
> > +}
> > +
> > +static void pinmux_init(void)
> > +{
> > + struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr
> > *)NV_PA_APB_MISC_BASE; +
> > + /* SDIO 1 */
> > + clrbits_le32(&pmt->pmt_tri[TRISTATE_REG(PIN_ATA)], 1 << 30);
> > +
> > + /* Mux SDB/SDC to PWM */
> > + clrsetbits_le32(&pmt->pmt_ctl_d, 0xcc00, 0x4400);
> > +
> > + /* Mux SDIO1 to UARTA */
> > + setbits_le32(&pmt->pmt_ctl_a, 3 << 30);
> > +
> > + return 0;
> > +}
>
> There are pinmux functions also :-)
Really ? Where are these ?!
>
> > +
> > +#ifdef CONFIG_BOARD_EARLY_INIT_F
> > +extern int tegra2_start(void);
> > +int board_early_init_f(void)
> > +{
> > + pinmux_init();
> > + uart_init();
> > + tegra2_start();
> > + return 0;
> > +}
> > +#endif
> > +
> > +int board_init(void)
> > +{
> > + gd->bd->bi_boot_params = NV_PA_SDRAM_BASE + 0x100;
> > + return 0;
> > +}
> > diff --git a/boards.cfg b/boards.cfg
> > index c485cd7..6cc2855 100644
> > --- a/boards.cfg
> > +++ b/boards.cfg
> > @@ -188,6 +188,7 @@ s5pc210_universal arm armv7
> > universal_c210 samsung smdkv310 arm
> > armv7 smdkv310 samsung s5pc2xx harmony
> > arm armv7 harmony nvidia
> > tegra2 seaboard arm armv7 seaboard
> > nvidia tegra2 +colibri_t20 arm
> > armv7 colibri_t20 toradex tegra2 u8500_href
> > arm armv7 u8500 st-ericsson
> > u8500 actux1_4_16 arm ixp actux1
> > - - actux1:FLASH2X2 actux1_8_16
> > arm ixp actux1 - -
> > actux1:FLASH1X8 diff --git a/include/configs/colibri_t20.h
> > b/include/configs/colibri_t20.h new file mode 100644
> > index 0000000..8fc0898
> > --- /dev/null
> > +++ b/include/configs/colibri_t20.h
> > @@ -0,0 +1,162 @@
> > +/*
> > + * Toradex Colibri T20 Configuration File
> > + *
> > + * Copyright (C) 2011 Marek Vasut <marek.va...@gmail.com>
> > + *
> > + * Based on code:
> > + *
> > + * Copyright (C) 2011 Ant Micro <www.antmicro.com>
> > + * Copyright (C) 2010, 2011 NVIDIA Corporation <www.nvidia.com>
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > + * MA 02111-1307 USA
> > + */
> > +
> > +#ifndef __CONFIG_H
> > +#define __CONFIG_H
> > +
> > +#include <asm/sizes.h>
> > +#include <asm/arch/tegra2.h>
>
> Are you ok with including tegra2-common.h here?
No, I had to do multiple changes (like different stack position etc).
[...]
>
> Regards,
> Simon (Warren?)
Cheers
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