This magic constant with zero documentation, when it's last 8 bits are set to 0x45, configures correctly the PERCLK dividers. Therefore the I2C operates correctly when divider computed from PERCLK.
Note: This constant is written to CBCDR register in arch/arm/cpu/armv7/mx5/lowlevel_init.S, but it's written only once. The register is accessed three more times in the file, with different values written to it each time. Signed-off-by: Marek Vasut <marek.va...@gmail.com> --- include/configs/efikamx.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h index d4e77c2..1fa29d2 100644 --- a/include/configs/efikamx.h +++ b/include/configs/efikamx.h @@ -284,6 +284,6 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_SYS_DDR_CLKSEL 0 -#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 +#define CONFIG_SYS_CLKTL_CBCDR 0x59E35145 #endif -- 1.7.5.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot