Hi Albert,
On Monday 01 August 2011 04:48 PM, Aneesh V wrote:
> c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable()
> to board_init_r(). This enables d-cache for all ARM boards.
> As a result some of the arm boards that are not cache-ready
> are broken. Revert this change and allow platform code to
> take the decision on d-cache enabling.
>
> Also add some documentation for cache usage in ARM.
>
> Signed-off-by: Aneesh V<ane...@ti.com>
> ---
> MAKEALL pending. Will update the results tomorrow.
> ---
> arch/arm/lib/board.c | 8 +++-----
> arch/arm/lib/cache.c | 12 ++++++++++++
> doc/README.arm-caches | 40 ++++++++++++++++++++++++++++++++++++++++
> include/common.h | 1 +
> 4 files changed, 56 insertions(+), 5 deletions(-)
> create mode 100644 doc/README.arm-caches
>
> diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
> index 90709d0..d093d5b 100644
> --- a/arch/arm/lib/board.c
> +++ b/arch/arm/lib/board.c
> @@ -446,11 +446,9 @@ void board_init_r (gd_t *id, ulong dest_addr)
> gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
>
> monitor_flash_len = _end_ofs;
> - /*
> - * Enable D$:
> - * I$, if needed, must be already enabled in start.S
> - */
> - dcache_enable();
> +
> + /* Enable caches */
> + enable_caches();
>
> debug ("monitor flash len: %08lX\n", monitor_flash_len);
> board_init(); /* Setup chipselects */
> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
> index 92b61a2..b545fb7 100644
> --- a/arch/arm/lib/cache.c
> +++ b/arch/arm/lib/cache.c
> @@ -53,3 +53,15 @@ void __flush_dcache_all(void)
> }
> void flush_dcache_all(void)
> __attribute__((weak, alias("__flush_dcache_all")));
> +
> +
> +/*
> + * Default implementation of enable_caches()
> + * Real implementation should be in platform code
> + */
> +void __enable_caches(void)
> +{
> + puts("WARNING: Caches not enabled\n");
> +}
> +void enable_caches(void)
> + __attribute__((weak, alias("__enable_caches")));
> diff --git a/doc/README.arm-caches b/doc/README.arm-caches
> new file mode 100644
> index 0000000..9edc252
> --- /dev/null
> +++ b/doc/README.arm-caches
> @@ -0,0 +1,40 @@
> +Disabling I-cache:
> +- Set CONFIG_SYS_ICACHE_OFF
> +
> +Disabling D-cache:
> +- Set CONFIG_SYS_DCACHE_OFF
> +
> +Enabling I-cache:
> +- Make sure CONFIG_SYS_ICACHE_OFF is not set and call icache_enable().
> +
> +Enabling D-cache:
> +- Make sure CONFIG_SYS_ICACHE_OFF is not set and call dcache_enable().
> +
> +Enabling Caches at System Startup:
> +- Implement enable_caches() for your platform and enable the I-cache and
> + D-cache from this function. This function is called immediately
> + after relocation.
> +
> +Guidelines for Working with D-cache:
> +
> +Memory to Peripheral DMA:
> +- Flush the buffer after the MPU writes the data and before the DMA is
> + initiated.
> +
> +Peripheral to Memory DMA:
> +- Invalidate the buffer after the DMA is complete and before the MPU reads
> + it.
The other discussion we are having about caches made me realize that I
need to improve the above guideline like this:
Peripheral to Memory DMA:
- Invalidate the buffer before starting the DMA(This is for preventing
cache-line replacements from corrupting the DMA buffer during the
course of DMA).
- Invalidate the buffer after the DMA is complete and before the MPU
reads it.
I shall submit an updated patch for this.
best regards,
Aneesh
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