Hi, Aneesh,
2011/8/1 Aneesh V <ane...@ti.com>:
> c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable()
> to board_init_r(). This enables d-cache for all ARM boards.
> As a result some of the arm boards that are not cache-ready
> are broken. Revert this change and allow platform code to
> take the decision on d-cache enabling.
>
> Also add some documentation for cache usage in ARM.
>
> Signed-off-by: Aneesh V <ane...@ti.com>
> ---
> MAKEALL pending. Will update the results tomorrow.
> ---
> arch/arm/lib/board.c | 8 +++-----
> arch/arm/lib/cache.c | 12 ++++++++++++
> doc/README.arm-caches | 40 ++++++++++++++++++++++++++++++++++++++++
> include/common.h | 1 +
> 4 files changed, 56 insertions(+), 5 deletions(-)
> create mode 100644 doc/README.arm-caches
>
> diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
> index 90709d0..d093d5b 100644
> --- a/arch/arm/lib/board.c
> +++ b/arch/arm/lib/board.c
> @@ -446,11 +446,9 @@ void board_init_r (gd_t *id, ulong dest_addr)
> gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
>
> monitor_flash_len = _end_ofs;
> - /*
> - * Enable D$:
> - * I$, if needed, must be already enabled in start.S
> - */
> - dcache_enable();
> +
> + /* Enable caches */
> + enable_caches();
>
> debug ("monitor flash len: %08lX\n", monitor_flash_len);
> board_init(); /* Setup chipselects */
> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
> index 92b61a2..b545fb7 100644
> --- a/arch/arm/lib/cache.c
> +++ b/arch/arm/lib/cache.c
> @@ -53,3 +53,15 @@ void __flush_dcache_all(void)
> }
> void flush_dcache_all(void)
> __attribute__((weak, alias("__flush_dcache_all")));
> +
> +
> +/*
> + * Default implementation of enable_caches()
> + * Real implementation should be in platform code
> + */
> +void __enable_caches(void)
> +{
> + puts("WARNING: Caches not enabled\n");
> +}
> +void enable_caches(void)
> + __attribute__((weak, alias("__enable_caches")));
What about the following change?
#ifndef CONFIG_SYS_DCACHE_OFF
dcache_enable();
#else
puts("WARNING: Caches not enabled\n");
#endif
This can avoid adding the duplicated cache-enable code in every board later.
Just looked at your patches for omap3 and omap4:
arch/arm/cpu/armv7/omap3/board.c | 8 ++++++++
arch/arm/cpu/armv7/omap4/board.c | 8 ++++++++
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 98519a9..de0e90d 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -390,3 +390,11 @@ void v7_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
}
#endif
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c
index de4cc2a..6ea8a2e 100644
--- a/arch/arm/cpu/armv7/omap4/board.c
+++ b/arch/arm/cpu/armv7/omap4/board.c
@@ -139,3 +139,11 @@ void v7_outer_cache_disable(void)
set_pl310_ctrl_reg(0);
}
#endif
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
Maybe there will be many many duplicated code like this, do you wish that?
Jason
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