From: Poonam Aggrwal <poonam.aggr...@freescale.com>
Issue:
Peripheral connected to IFC_CS3 may hamper booting from IFC.
Impact:
Boot from IFC may not be successful if IFC_CS3 is used.
Workaround:
If IFC_CS3 is used, gate IFC_CS3 while booting from NAND or NOR.
Also Software should select IFC_CS3 using PMUXCR[26:27] = 0x01.
Signed-off-by: Poonam Aggrwal <poonam.aggr...@freescale.com>
Signed-off-by: Kumar Gala <ga...@kernel.crashing.org>
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 +++
arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 12 ++++++++++++
arch/powerpc/include/asm/config_mpc85xx.h | 2 ++
3 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 446f759..c2fb5b8 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -90,6 +90,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
#ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A002769
puts("Work-around for Erratum IFC-A002769 enabled\n");
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549
+ puts("Work-around for Erratum P1010-A003549 enabled\n");
+#endif
return 0;
}
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index 359f03e..c42efb1 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
@@ -30,6 +30,9 @@ void cpu_init_early_f(void)
{
u32 mas0, mas1, mas2, mas3, mas7;
int i;
+#ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+#endif
/* Pointer is writable since we allocated a register for it */
gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
@@ -49,6 +52,15 @@ void cpu_init_early_f(void)
write_tlb(mas0, mas1, mas2, mas3, mas7);
+/*
+ * Work Around for IFC Erratum A-003549. This issue is P1010
+ * specific. LCLK(a free running clk signal) is muxed with IFC_CS3 on P1010 SOC
+ * Hence specifically selecting CS3.
+ */
+#ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549
+ setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_LCLK_IFC_CS3);
+#endif
+
init_laws();
invalidate_tlb(1);
init_tlbs();
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index f334645..61c19ea 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -113,6 +113,7 @@
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
+#define CONFIG_SYS_FSL_ERRATUM_P1010_A003549
/* P1011 is single core version of P1020 */
#elif defined(CONFIG_P1011)
@@ -162,6 +163,7 @@
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
+#define CONFIG_SYS_FSL_ERRATUM_P1010_A003549
/* P1015 is single core version of P1024 */
#elif defined(CONFIG_P1015)
--
1.7.3.4
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